參數(shù)資料
型號: ST24LC21B1TR
廠商: 意法半導(dǎo)體
英文描述: Controller IC; Package/Case:14-DIP; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):No; Mounting Type:Through Hole
中文描述: 1kB的x8串行EEPROM的雙模式為韋莎插頭
文件頁數(shù): 1/18頁
文件大小: 149K
代理商: ST24LC21B1TR
ST24LC21
1Kb (x8) DUAL MODE SERIAL EEPROM
for VESA Plug&Play
NOT FOR NEW DESIGN
June 1997
1/18
This is information on a product still in production but not recommended for new designs.
1 MILLION ERASE/WRITE CYCLES
40 YEARS DATA RETENTION
2.5V to 5.5V SINGLE SUPPLY VOLTAGE
400k Hz COMPATIBILITY OVER the FULL
RANGE of SUPPLY VOLTAGE
TWO WIRE SERIAL INTERFACE I
2
C BUS
COMPATIBLE
PAGE WRITE (up to 8 BYTES)
BYTE, RANDOM and SEQUENTIAL READ
MODES
SELF TIMED PROGRAMMING CYCLE
AUTOMATIC ADDRESS INCREMENTING
ENHANCED ESD/LATCH UP
PERFORMANCES
ST24LC21 is replaced by the ST24LC21B
DESCRIPTION
The ST24LC21 is a 1K bit electrically erasable
programmable memory (EEPROM), organized by
8 bits.This device can operate in two modes: Trans-
mit Only mode and I
2
C bidirectional mode. When
powered, the device is in Transmit Only mode with
EEPROM data clocked out from the rising edge of
the signal applied on VCLK.
The device will switch to the I
2
C bidirectional mode
upon the falling edge of the signal applied on SCL
pin. The ST24LC21 cannot switch from the I
2
C
bidirectional mode to the Transmit Only mode (ex-
cept when the power supply is removed). The
device operates with a power supply value as low
as 2.5V. Both Plastic Dual-in-Line and Plastic Small
Outline packages are available.
AI01489
SDA
VCC
ST24LC21
VCLK
SCL
VSS
Figure 1. Logic Diagram
SDA
Serial Data Address Input/Output
SCL
Serial Clock (I
2
C mode)
V
CC
Supply Voltage
V
SS
Ground
VCLK
Clock Transmit only mode
Table 1. Signal Names
8
1
SO8 (M)
8
1
PSDIP8 (B)
0.25mm Frame
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