參數(shù)資料
型號： ST16C654CQ100
廠商： EXAR CORP
元件分類： 微控制器/微處理器
英文描述： 2.97V TO 5.5V QUAD UART WITH 64-BYTE FIFO
中文描述： 4 CHANNEL(S), 1.5M bps, SERIAL COMM CONTROLLER, PQFP100
封裝： 14 X 20 MM, PLASTIC, QFP-100
文件頁數(shù)： 35/51頁
文件大?。?/td> 968K
代理商： ST16C654CQ100
ST16C654/654D
2.97V TO 5.5V QUAD UART WITH 64-BYTE FIFO
REV. 5.0.0
35
EFR[6]: Auto RTS Flow Control Enable
RTS# output may be used for hardware flow control by setting EFR bit-6 to logic 1. When Auto RTS is selected,
an interrupt will be generated when the receive FIFO is filled to the programmed trigger level and RTS de-
asserts to a logic 1 at the next upper trigger level/hysteresis level. RTS# will return to a logic 0 when FIFO data
falls below the next lower trigger level/hysteresis level. The RTS# output must be asserted (logic 0) before the
auto RTS can take effect. RTS# pin will function as a general purpose output when hardware flow control is
disabled.
Logic 0 = Automatic RTS flow control is disabled (default).
Logic 1 = Enable Automatic RTS flow control.
EFR[7]: Auto CTS Flow Control Enable
Automatic CTS Flow Control.
Logic 0 = Automatic CTS flow control is disabled (default).
Logic 1 = Enable Automatic CTS flow control. Data transmission stops when CTS# input de-asserts to logic
1. Data transmission resumes when CTS# returns to a logic 0.
4.13
Software Flow Control Registers (XOFF1, XOFF2, XON1, XON2) - Read/Write
These registers are used as the programmable software flow control characters xoff1, xoff2, xon1, and xon2.
For more details, see
Table 8
.
4.14
FIFO Status Register (FSTAT) - Read/Write
This register is applicable only to the 100 pin QFP ST16C654. The FIFO Status Register provides a status
indication for each of the transmit and receive FIFO. These status bits contain the inverted logic states of the
TXRDY# A-D outputs and the (un-inverted) logic states of the RXRDY# A-D outputs. The contents of the
FSTAT register are placed on the data bus when the FSRS# pin (pin 76) is a logic 0. Also see FSRS# pin
description.
FSTAT[3:0]: TXRDY# A-D Status Bits
Please see
Table 5
for the interpretation of the TXRDY# signals.
FSTAT[7:4]: RXRDY# A-D Status Bits
Please see
Table 5
for the interpretation of the RXRDY# signals.
相關(guān)PDF資料
PDF描述
ST16C654 Linear Voltage Regulator IC; Output Current Max:350mA; Supply Voltage Max:6V; Package/Case:8-TSSOP; Output Current:600mA; Output Voltage:5V; Current Rating:30.05A; Leaded Process Compatible:No; Output Voltage Max:5V
ST16C654CQ64 2.97V TO 5.5V QUAD UART WITH 64-BYTE FIFO
ST16C654D Voltage Regulator IC; Package/Case:8-MSOP; Output Current:300mA; Output Voltage:3.3V; Supply Voltage Max:6V; Current Rating:300mA; Leaded Process Compatible:No; Output Current Max:300mA; Output Voltage Max:3.3V RoHS Compliant: No
ST16C654DIQ64 2.97V TO 5.5V QUAD UART WITH 64-BYTE FIFO
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ST16C654CQ100-0A-EB 功能描述:界面開發(fā)工具 Supports C654 100 ld QFP, ISA Interface RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
ST16C654CQ100-F 功能描述:UART 接口集成電路 2.97V-5.5V 64B FIFO temp 0C to 70C; UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
ST16C654CQ64 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD UART WITH 64-BYTE FIFO AND INFRARED (IrDA) ENCODER/DECODER
ST16C654CQ64-0A-EVB 功能描述:界面開發(fā)工具 Supports C654 64 ld TQFP, ISA Interface RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
ST16C654CQ64-F 功能描述:UART 接口集成電路 2.97V-5.5V 64B FIFO temp 0C to 70C; UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
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