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參數(shù)資料
| 型號(hào)： | ST16C554DCQ64 |
| 廠商： | EXAR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | QUAD UART WITH 16-BYTE FIFOS |
| 中文描述： | 4 CHANNEL(S), 1.5M bps, SERIAL COMM CONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, LQFP-64 |
| 文件頁數(shù)： | 13/40頁 |
| 文件大?。?/td> | 518K |
| 代理商： | ST16C554DCQ64 |
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ST16C554/554D/68C554
13
Rev. 3.10
FIFO Operation
The 16 byte transmit and receive data FIFOs are
enabled by the FIFO Control Register (FCR) bit-0.
With 16C554 devices, the user can only set the
receive trigger level. The receiver FIFO section in-
cludes a time-out function to ensure data is delivered
to the external CPU. An interrupt is generated when-
ever the Receive Holding Register (RHR) has not
been read following the loading of a character or the
receive trigger level has not been reached.
Timeout Interrupts
The interrupts are enabled by IER bits 0-3. Care must
be taken when handling these interrupts. Following a
reset the transmitter interrupt is enabled, the 554D will
issue an interrupt to indicate that transmit holding
register is empty. This interrupt must be serviced prior
to continuing operations. The LSR register provides
the current singular highest priority interrupt only.
Servicing the interrupt without investigating further
interrupt conditions can result in data errors.
When two interrupt conditions have the same priority,
it is important to service these interrupts correctly.
Receive Data Ready and Receive Time Out have the
same interrupt priority (when enabled by IER bit-0).
The receiver issues an interrupt after the number of
characters have reached the programmed trigger
level. In this case the 554D FIFO may hold more
characters than the programmed trigger level. Follow-
ing the removal of a data byte, the user should recheck
LSR bit-0 for additional characters. A Receive Time
Out will not occur if the receive FIFO is empty. The
time out counter is reset at the center of each stop bit
received or each time the receive holding register
(RHR) is read. The actual time out value is T (
T
ime out
length in bits) = 4 X P (
P
rogrammed word length) + 12.
To convert the time out value to a character value, the
user has to consider the complete word length, includ-
ing data information length, start bit, parity bit, and the
size of stop bit, i.e., 1X, 1.5X, or 2X bit times.
Example -A: If the user programs a word length of 7,
with no parity and one stop bit, the time out will be:
T = 4 X 7( programmed word length) +12 = 40 bit times.
The character time will be equal to 40 / 9 = 4.4
characters, or as shown in the fully worked out ex-
ample: T = [(programmed word length = 7) + (stop bit
= 1) + (start bit = 1) = 9]. 40 (bit times divided by 9) =
4.4 characters.
Example -B: If the user programs the word length = 7,
with parity and one stop bit, the time out will be:
T = 4 X 7(programmed word length) + 12 = 40 bit times.
Character time = 40 / 10 [ (programmed word length
= 7) + (parity = 1) + (stop bit = 1) + (start bit = 1) = 4
characters.
In the 16 mode for 68 pin packages, the system/board
designer can optionally provide software controlled
three state interrupt operation. This is accomplished
by INTSEL and MCR bit-3. When INTSEL interface
pin is left open or made a logic 0, MCR bit-3 controls
the three state interrupt outputs, INT A-D. When
INTSEL is a logic 1, MCR bit-3 has no effect on the INT
A-D outputs and the package operates with interrupt
outputs enabled continuously.
Programmable Baud Rate Generator
The 554D supports high speed modem technologies
that have increased input data rates by employing
data compression schemes. For example a 33.6Kbps
modem that employs data compression may require a
115.2Kbps input data rate. A 128.0Kbps ISDN modem
that supports data compression may need an input
data rate of 460.8Kbps. The 554D can support a
standard data rate of 921.6Kbps.
Single baud rate generator is provided for the
transmitter and receiver, allowing independent TX/
RX channel control. The programmable Baud Rate
Generator is capable of accepting an input clock up
to 24 MHz, as required for supporting a 1.5Mbps
data rate. The 554D can be configured for internal
or external clock operation. For internal clock
oscillator operation, an industry standard micropro-
cessor crystal (parallel resonant/ 22-33 pF load) is
connected externally between the XTAL1 and
XTAL2 pins (see figure 8). Alternatively, an external
clock can be connected to the XTAL1 pin to clock
the internal baud rate generator for standard or
custom rates. (see Baud Rate Generator Program-
ming).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST16C554 | Quad UART with 16-Byte FIFO(四通用異步接收器/發(fā)送器（帶16字節(jié)的先進(jìn)先出）) |
| ST16C554D | Quad UART with 16-Byte FIFO(四通用異步接收器/發(fā)送器（帶16字節(jié)的先進(jìn)先出）) |
| ST16C580 | UART WITH 16-BYTE FIFO’s AND INFRARED (IrDA) ENCODER/DECODER |
| ST16C580CQ48 | UART WITH 16-BYTE FIFO’s AND INFRARED (IrDA) ENCODER/DECODER |
| ST16C580IJ44 | UART WITH 16-BYTE FIFO’s AND INFRARED (IrDA) ENCODER/DECODER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST16C554DCQ64F | 制造商:Exar Corporation 功能描述: |
| ST16C554DCQ64-F | 功能描述:UART 接口集成電路 2.97V-5.5V 16B FIFO temp 0C to 70C; UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| ST16C554DCQ64TR-F | 功能描述:UART 接口集成電路 QUAD UART W/16 BYTE FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| ST16C554DIJ68 | 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD UART WITH 16-BYTE FIFOS |
| ST16C554DIJ68-F | 功能描述:UART 接口集成電路 2.97V-5.5V 16B FIFO temp -45 to 85C;UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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