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參數(shù)資料
| 型號： | ST16C2552CJ |
| 廠商： | EXAR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2.97V TO 5.5V DUAL UART WITH 16-BYTE FIFO |
| 中文描述： | 2 CHANNEL(S), 4M bps, SERIAL COMM CONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 11/28頁 |
| 文件大小： | 121K |
| 代理商： | ST16C2552CJ |
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ST16C2552
S
MCR BIT-2:
Not used except in local loop-back mode.
MCR BIT-3:
0=force OP2* output to high.
1=force OP2* output to low.
MCR BIT-4:
0=normal operating mode.
1=enable local loop-back mode (diagnostics). The
transmitter output (TX) is set high (Mark condition),
the receiver input (RX) , CTS*, DSR*, CD*, and RI* are
disabled. Internally the transmitter output is con-
nected to the receiver input and DTR*, RTS*, OP1*
and OP2* are connected to modem control inputs.
In this mode , the receiver and transmitter interrupts
are fully operational. The Modem Control Interrupts
are also operational, but the interrupts sources are
now the lower four bits of the Modem Control Register
instead of the four Modem Control inputs. The inter-
rupts are still controlled by the IER .
MCR BIT 5-7:
Not used. Are set to zero permanently.
LINE STATUS REGISTER (LSR)
This register provides the status of data transfer to
CPU.
LSR BIT-0:
0=no data in receive holding register or FIFO.
1=data has been received and saved in the receive
holding register or FIFO.
LSR BIT-1:
0=no overrun error (normal).
1=overrun error, next character arrived before receive
holding register was emptied or if FIFOs are enabled,
an overrun error will occur only after the FIFO is full
and the next character has been completely received
in the shift register. Note that character in the shift
register is overwritten, but it is not transferred to the
FIFO.
LSR BIT-2:
0=no parity error (normal).
1=parity error, received data does not have correct
parity information. In the FIFO mode this error is
associated with the character at the top of the FIFO.
LSR BIT-3:
0=no framing error (normal).
1=framing error received, received data did not have
a valid stop bit. In the FIFO mode this error is
associated with the character at the top of the FIFO.
LSR BIT-4:
0=no break condition (normal).
1=receiver received a break signal (RX was low for
one character time frame). In FIFO mode, only one
zero character is loaded into the FIFO.
LSR BIT-5:
0=transmit holding register is full. ST16C2552 will not
accept any data for transmission.
1=transmit holding register (or FIFO ) is empty. CPU
can load the next character.
LSR BIT-6:
0=transmitter holding and shift registers are full.
1=transmitter holding and shift registers are empty. In
FIFO mode this bit is set to one whenever the trans-
mitter FIFO and transmit shift register are empty.
LSR BIT-7:
0=Normal.
1=At least one parity error, framing error or break
indication in the FIFO. This bit is cleared when LSR is
read.
MODEM STATUS REGISTER (MSR)
This register provides the current state of the control
lines from the modem or peripheral to the CPU. Four
bits of this register are used to indicate the changed
information. These bits are set to “1” whenever a
control input from the MODEM changes state. They
are set to “0” whenever the CPU reads this register.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST16C2552IJ | 2.97V TO 5.5V DUAL UART WITH 16-BYTE FIFO |
| ST16C452IJ68 | DUAL UART WITH PARALLEL PRINTER PORT |
| ST16C452IJ68PS | DUAL UART WITH PARALLEL PRINTER PORT |
| ST16C452CJ68 | Power Supply IC; Number of Outputs:1; Supply Voltage Max:5.5V; Package/Case:10-MSOP; Leaded Process Compatible:No; Output Current:150mA; Output Voltage Max:1.3V; Peak Reflow Compatible (260 C):No; Power Dissipation:481mW |
| ST16C452CJ68PS | Power Supply IC; Number of Outputs:1; Supply Voltage Max:5.5V; Package/Case:10-MSOP; Leaded Process Compatible:No; Output Current:150mA; Output Voltage Max:1.3V; Peak Reflow Compatible (260 C):No; Power Dissipation:481mW |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST16C2552CJ-0A-EB | 功能描述:界面開發(fā)工具 Supports C2550 44 ld PLCC, ISA Interface RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| ST16C2552CJ44 | 制造商:Exar Corporation 功能描述: 制造商:Exar Corporation 功能描述:UART, 44 Pin, Plastic, PLCC 制造商:EXER 功能描述:UART, 44 Pin, Plastic, PLCC 制造商:STAR 功能描述:UART, 44 Pin, Plastic, PLCC 制造商:STARTECH 功能描述:UART, 44 Pin, Plastic, PLCC |
| ST16C2552CJ44-F | 功能描述:UART 接口集成電路 2.97V-5.5V 16B FIFO temp 0C to 70C; UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| ST16C2552CJ44TR | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
| ST16C2552CJ44TR-F | 功能描述:UART 接口集成電路 DUAL UART W/16BYTE FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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