參數(shù)資料
型號(hào)： SST55LD017D-40-C-TQWE
廠商： SILICON STORAGE TECHNOLOGY INC
元件分類： 存儲(chǔ)控制器/管理單元
英文描述： FLASH MEMORY DRIVE CONTROLLER, PQFP100
封裝： TQFP-100
文件頁(yè)數(shù)： 6/59頁(yè)
文件大?。?/td> 702K
代理商： SST55LD017D-40-C-TQWE
14
EOL Product Document
ATA Flash Disk Controller
SST55LD017D
2006 Silicon Storage Technology, Inc.
S71225-01-EOL
4/06
5.0 MANUFACTURING SUPPORT
The ATA Flash Disk Controller comes preprogrammed with an embedded flash file system. Upon the initial power-
up, the controller scans all the connected flash media devices, sets up a bad block table, executes all the neces-
sary handshaking routines for flash media support, and finally performs the low level format. This process is fully
automated and will typically take about 0.5 sec/MB of drive capacity, allowing a 640 MByte flash drive to be fully ini-
tialized in about 5 minutes.
If the drive initialization fails, and a visual inspection is unable to determine the problem, the SST55LD017D ATA
Flash Disk Controller provides a comprehensive interface for manufacturing flow debug. This interface not only
allows debug of the failure and manual reset the initialization process, but also allows customization of user defin-
able options.
5.1 ATA/IDE Interface
For end applications allowing direct ATA/IDE interface, such as flash drive or module designs, the ATA bus can be
used for manufacturing support. SST provides an example of a DOS-based solution (executable routine) for manu-
facturing debug and rework downloadable from SST’s web site.
5.2 Serial Communication Interface (SCI)
For end applications where an ATA/IDE interface is internalized, such as embedded designs where the ATA Flash
Disk Controller is attached to the system motherboard, the SCI bus can be used for manufacturing support. The
Serial Communication Interface consists of 3 signals: SCIDOUT, SCIDIN, and SCICLK. Make sure that the SCI
header is integrated in the design in the same signal sequence as shown on the reference designs in Section 13.2.
Please refer to the Design Consideration for ATA Flash Disk Controller’s Serial Communication Interface applica-
tion note for further details. SST provides an example of a DOS-based solution (executable routine) for manufactur-
ing debug and rework through the SCI port, downloadable from SST’s web site.
6.0 EXTERNAL CLOCK INTERFACE
The External Clock interface allows an external clock source to drive the ATA Flash Disk Controller. While the control-
ler has an internal clock source, the External Clock interface allows slowing of the clock operation to limit the peak
current. Please see the External Clock Operation for ATA Flash Disk Controller application note for further details.
The External Clock interface consists of three signals: INTCLKEN#, EXTCLKIN, and EXTCLKOUT. The INTCLKEN#
pin selects between external and internal clock sources for the ATA Flash Disk Controller. If this pin is pulled low
before device power-up, then the internal clock source is selected; otherwise, the external clock source is selected.
The EXTCLKIN and EXTCLKOUT signals are the input and output clock signals, respectively. Please see Section
13.2 for the detailed reference schematic.
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