參數(shù)資料
型號(hào): SPX2815AU-2.5
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: 1.5A Low Dropout Voltage Regulator Adjustable & Fixed Output, Fast Response
中文描述: 1.5A的低壓差線性穩(wěn)壓器可調(diào)節(jié)
文件頁(yè)數(shù): 4/10頁(yè)
文件大?。?/td> 73K
代理商: SPX2815AU-2.5
4
Date: 5/17/04 SPX2815 1.5A Low Dropout Voltage Regulator
Copyright 2004 Sipex Corporation
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Frequency, Hz
R
Figure 5. Ripple Rejection; Vin=3.3V, Vout=1.8V (adj.),
Iload=200mA
Figure 6. Current Source
LOAD
ADJ
SPX2815
V
IN
C
1
OUT
IN
4.7
μ
F
C
2
I
OUT
R
1
V
REF
R
1
I
OUT
=
+
V
OUT
Ripple Rejection
Ripple rejection can be improved by adding a
capacitor between the ADJ pin and ground as
shown in Figure 8. When ADJ pin bypassing
is used, the value of the output capacitor
required increases to its maximum. If the ADJ
pin is not bypassed, the value of the output
capacitor can be lowered to 22
μ
F for an
electrolytic aluminum capacitor or 10
μ
F for a
solid tantalum capacitor (Fig 7).
However the value of the ADJ-bypass capaci-
tor should be chosen with respect to the
following equation:
C = 1 / ( 6.28 * F
R
* R
1
)
Where
C = value of the capacitor in Farads
(select an equal or larger standard value),
F
R
= ripple frequency in Hz,
R
1
= value of resistor R1 in Ohms.
If an ADJ-bypass capacitor is used, the
amplitude of the output ripple will be indepen-
dent of the output voltage. If an ADJ-bypass
capacitor is not used, the output ripple will be
proportional to the ratio of the output voltage
to the reference voltage:
M = V
OUT
/ V
REF
Where M = multiplier for the ripple seen when
the ADJ pin is optimally bypassed.
V
REF
=1.25V
Ripple rejection for the adjustable version is
shown in Figure 5.
Output Voltage
The output of the adjustable regulator can be
set to any voltage between 1.25V and 15V.
The value of V
can be quickly approxi-
mated using the formula
V
OUT
=1.25 *(R
1
+ R
2
)/R
1
A small correction to this formula is required
depending on the values of resistors R
and R
2
,
since the adjustable pin current (approx
50
μ
A) flows through R
. When I
ADJ
is taken
into account, the formula becomes
V
OUT
= V
REF
(1+ (R
2
/R
1
)) + I
ADJ
* R
2
where
V
REF
=1.25V
Layout Considerations
Parasitic line resistance can degrade load
regulation. In order to avoid this, connect R
1
directly to V
as illustrated in Figure 13.
For the same reason, R
should be connected
to the negative side of the load.
APPLICATION INFORMATION: Continued
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