4
Rev:A Date: 3/18/04
SP8126B High Speed Differential APC Amplifier
Copyright 2004 Sipex Corporation
The
±
6dB Gain adjustment is therefore done
directly in the TIA, by adjusting the active
feedback blocks proportional with the gain set-
ting resistor. The external resistor is not directly
in the signal path, and therefore any parasitic
from the off-chip connections does not affect
the signal quality. The value of the active feed-
back is controlled tightly over supply and tem-
perature changes through a Control Block with
active feedback circuitry.
Gain control is proportional with the external
resistor, so the lowest value of R
GAIN
will pro-
duce the -6dB gain adjustment and the highest
value will produce the +6dB gain adjustment.
Please consult the specification table for the
required R
GAIN
values.
Buffer
This stage buffers the differential signal from
the TIA to the V
OUT
pins and refers the signal to
the internal reference voltage. A balanced cur-
rent feedback amplifier is used for this purpose
to achieve high slew rate and fast settling.
The buffer is designed to drive high capacitive
loads. The maximum load is 50pF bulk. The
actual load is typically a flexible printed circuit
(FPC) that acts like a transmission line. This
presents a distributed capacitive load plus in-
ductance and resistance. In this case care should be
taken to match the characteristic impedance of the
line at the far end to avoid standing waves and
ringing. The buffer is designed to drive 1k
to
ground. However, this resistor can be adjusted in
value to accommodate the characteristic imped-
ance of the signal trace. The output buffer ampli-
fier is designed to be stable without load and with
loads up to 50pF lumped capacitance.
THEORY OF OPERATION: Continued
180M
160M
140M
120M
100M
80M
60M
40M
0.0
250
500
750
R
GAIN
1.0k
1.25K
1.5k
-9.5dB
0.0dB
-6.0dB
(
6 .0dB
Figure 3. Bandwidth versus R
GAIN
TABLE 1: APC SYSTEM TARGET GAIN SET POINTS.
V
OUTP
-V
OUTN
= 2V
P-P
, V
CC
= 5V, T = 27
°
C
Gain
(dB)
+6
0
-6
Sensitivity
(V/W)
6000
3000
1500
R
GAIN
(
)
1230
510
225
Ts 1%
(nS)
12
7
5.5
BW
(MHz)
68
119
160
Pin
(
μ
W)
335
666
1331
Figure 2. Sensitivity versus R
GAIN
7.0k
6.0k
5.0k
4.0k
3.0k
2.0k
1.0k
0.0k
0.0
250
500
750
1.0k
1.25K
1.5k
R
GAIN