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參數(shù)資料
| 型號： | SP8107 |
| 英文描述： | Three Channel High Performance Laser Driver |
| 中文描述： | 三通道高性能激光驅(qū)動器 |
| 文件頁數(shù)： | 2/3頁 |
| 文件大?。?/td> | 146K |
| 代理商： | SP8107 |
Advanced
SP8107
Rev. 09/05/03 SP8107 – Three Channel Laser Driver
Copyright 2003 Sipex Corporation
SIPEX RESERVES THE RIGHT TO MAKE CHANGES TO THIS DATASHEET. CALL FOR UPDATES: 1-978-667-8700.
SIPEX CONFIDENTIAL, ADVANCED & PROPRIETARY. DO NOT DISTRIBUTE OR
COPY
page
2
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PIN ASSIGNMENTS
Pin
Number
1
2
3
4
5
Pin
Name
IR
I2
I3
RF
EN2
Pin Function
Read Channel current controlled input
Write Channel 2 current controlled input
Write Channel 3 current controlled input
Connection of an external resistor to GND to set oscillator frequency
Write Channel 2 enable input with an internal pull-up resistor. Logic high or
floating turns channel off.
Write Channel 3 enable input with an internal pull-up resistor. Logic high or
floating turns channel off.
Common device enable input with pull-down resistor. Logic low or floating
turns device off.
Oscillator enable input with pull-down resistor. Logic low or floating turns
oscillator off.
Supply voltage. Bypass to GND with 0.1uF ceramic capacitor
Output select input with pull-down resistor. Logic high selects output A, low or
floating selects output B
Output current source B for a laser diode
Connection of an external resistor to GND to set oscillator swing at the output B
Connection of an external resistor to GND to set oscillator swing at the output A
Ground pin
Output current source A for a laser diode
Supply voltage. Bypass to GND with ceramic capacitors 0.1 and 0.01uF in
parallel
6
EN3
7
ENABLE
8
OSCEN
9
10
Vcc
SELA
11
12
13
14
15
16
I
OUT
B
RSB
RSA
GND
I
OUT
A
Vcc
BOARD LAYOUT AND GROUNDING
To obtain the best performance from the SP8107, a printed circuit board with ground plane is required.
Layout should ensure that analog signal lines (IR, I2, and I3) are separated as much as possible from
digital and output power lines. Output power lines should be as short and wide as possible. High quality,
low series resistance ceramic 0.1 and 0.01uF bypass capacitors should be used at the Vcc pins 9 and 16.
These capacitors must be located as close to the pins as possible. The traces connecting the pins and the
bypassing capacitors must be kept short and should be made as wide as possible.
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