參數(shù)資料
型號(hào): SP674AA
元件分類: ADC
英文描述: 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP28
封裝: 0.600 INCH, CERDIP-28
文件頁數(shù): 5/14頁
文件大小: 204K
代理商: SP674AA
15
CHARACTERISTICS
Typical @ 25C, V
CC = +15V or +12V, VLOGIC
= +5V, V
EE = 0V, unless otherwise specified.
PARAMETER
MIN.
TYP.
MAX.
UNITS
CONDITIONS
tDD
Access Time From CE2
150
ns
tHD
Data Valid After CE Low2
25
ns
tHL
Output Float Delay2
150
ns
tSSR CS to CE Setup
50
0
ns
tSRR R/C to CE Setup
0
ns
tSAR A0 to CE Setup
50
ns
tHSR CS Valid After CE Low
0
ns
tHRR R/C High After CE Low
0
50
ns
tHAR A0 Valid After CE Low
50
ns
tHS
STS Delay After Data Valid
300
1000
ns
NOTES:
1.
Parameters guaranteed by design and sample tested.
2.
Parameters 100% tested @ 25C on special orders.
READ MODE TIMING
CE
CS
R/C
A0
STS
DB11–
DB0
HIGH
IMPEDANCE
tSSR
tHSR
tHRR
tSRR
tSAR
tHAR
tHD
DATA
VALID
tHL
tDD
Figure 11. Read Mode Timing
相關(guān)PDF資料
PDF描述
SP674AB 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP28
SP674AC 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP28
SP674AS/883 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP28
SP674AS 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP28
SP674AT/883 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP28
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