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SP510
32
ULTRA HIGH SPEED MULTIPROTOCOL TRANSCEIVER
REV. 1.0.1
FIGURE 45. FUNCTIONAL DIAGRAM
TxD
SD(a)
V35TGND1
SD(b)
SDEN
VCC
VDD
C1-
VSS
C1+
+5V (decoupling capacitor not shown)
1μF
Regulated Charge Pump
SP510
TxCE
TT(a)
V35TGND2
TT(b)
TTEN
ST
ST(a)
V35TGND3
ST(b)
STEN
RD(a)
RxD
RDEN
RD(b)
RT(a)
RxC
RTEN
RT(b)
TxC(a)
TxC
TxCEN
TxC(b)
CS(a)
CTS
CSEN
CS(b)
DM(a)
DSR
DMEN
DM(b)
RRT(a)
DCD_DTE
RRTEN
RRT(b)
TM(a)
TM
TMEN
RTS
RS(a)
RS(b)
RSEN
DTR
TR(a)
TR(b)
TREN
DCD_DCE
RRC(a)
RRC(b)
RRCEN
LL
LL(a)
LLEN
C2-
C2+
GND
D0
D1
D2
TERM-OFF
D-LATCH
V.10-GND
V.35 MODE
TX ENABLE
51ohms
124ohms
V.35 DRIVER TERMINATION NETWORK
V.35 MODE
RX ENABLE
51ohms
124ohms
RECEIVER TERMINATION NETWORK
V.11 MODE
RL
RL(a)
RLEN
IC
RI
ICEN
V35RGND
LOOPBACK
72
69
70
67
66
73
46
48
36
11
47
50
37
12
49
53
38
13
51
55
39
14
54
57
40
15
56
60
41
16
59
61
42
17
62
43
18
19
20
21
23
22
27
28
97
99
100
3
29
92
94
95
4
30
87
89
90
5
31
83
85
6
32
75
78
7
33
81
79
8
34
65
9
35
63
10
58
VCC pins (26, 64, 71, 77, 80, 84, 88, 93, 98)
GND pins (2, 25, 44, 52, 68, 74, 82, 86, 91, 96)
N.C. pins (24 and 76)
1μF
Logic Voltage
VL
VL pins (1 and 46)