參數(shù)資料
型號(hào): SN74LVC1G332DCKT
廠商: TEXAS INSTRUMENTS INC
元件分類: 門電路
英文描述: LVC/LCX/Z SERIES, 3-INPUT OR GATE, PDSO6
封裝: PLASTIC, SC-70, 6 PIN
文件頁數(shù): 1/17頁
文件大?。?/td> 827K
代理商: SN74LVC1G332DCKT
www.ti.com
FEATURES
Seemechanicaldrawingsfordimensions.
DBVPACKAGE
(TOP VIEW)
DCKPACKAGE
(TOP VIEW)
YEP OR YZP PACKAGE
(BOTTOMVIEW)
2
GND
V
CC
5
3
4
B
Y
6
1
A
C
3
4
B
2
GND
Y
5
1
A
V
CC
6
C
2
GND
V
CC
1
5
A
B
4
3
Y
6
C
DESCRIPTION/ORDERING INFORMATION
The SN74LVC1G332 performs the Boolean function in Y + A ) B ) C or Y + A B C positive logic.
SINGLE 3-INPUT POSITIVE-OR GATE
SCES489D – SEPTEMBER 2003 – REVISED SEPTEMBER 2006
Available in the Texas Instruments
Latch-Up Performance Exceeds 100 mA Per
NanoStar and NanoFree Packages
JESD 78, Class II
Supports 5-V V
CC Operation
ESD Protection Exceeds JESD 22
Inputs Accept Voltages to 5.5 V
– 2000-V Human-Body Model (A114-A)
Max t
pd of 4.5 ns at 3.3 V
– 200-V Machine Model (A115-A)
Low Power Consumption, 10-
A Max I
CC
– 1000-V Charged-Device Model (C101)
±24-mA Output Drive at 3.3 V
I
off Supports Partial-Power-Down Mode
Operation
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(2)
NanoStar – WCSP (DSBGA)
SN74LVC1G332YEPR
0.23-mm Large Bump – YEP
Reel of 3000
_ _ _CZ_
NanoFree – WCSP (DSBGA)
0.23-mm Large Bump – YZP
SN74LVC1G332YZPR
(Pb-free)
–40
°C to 85°C
Reel of 3000
SN74LVC1G332DBVR
SOT (SOT-23) – DBV
C2C_
Reel of 250
SN74LVC1G332DBVT
Reel of 3000
SN74LVC1G332DCKR
SOT (SC-70) – DCK
CZ_
Reel of 250
SN74LVC1G332DCKT
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2)
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb,
= Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 2003–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
相關(guān)PDF資料
PDF描述
SN74LVC1G332DBVR LVC/LCX/Z SERIES, 3-INPUT OR GATE, PDSO6
SN74LVC1G332DBVT LVC/LCX/Z SERIES, 3-INPUT OR GATE, PDSO6
SN74LVC1G34DCKR LVC/LCX/Z SERIES, 1-INPUT NON-INVERT GATE, PDSO5
SN74LVC1G373DCKT LVC/LCX/Z SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO6
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