參數(shù)資料
型號: SN74LV373ATPW
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
封裝: GREEN, PLASTIC, TSSOP-20
文件頁數(shù): 12/19頁
文件大小: 678K
代理商: SN74LV373ATPW
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
OE
To Seven Other Channels
1
11
3
2
LE
1D
C1
1D
1Q
SN74LV373AT
OCTAL TRANSPARENT D-TYPE LATCH
WITH 3-STATE OUTPUTS
SCES630B – JULY 2005 – REVISED AUGUST 2005
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or
low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need
for interface or pullup components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
FUNCTION TABLE
(EACH LATCH)
INPUTS
OUTPUT
Q
OE
LE
D
l
H
L
H
L
X
Q0
H
X
Z
LOGIC DIAGRAM (POSITIVE LOGIC)
2
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