參數(shù)資料
型號: SN74LV245ARGYRG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: LV/LV-A/LVX/H SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PQCC20
封裝: GREEN, PLASTIC, MO-241BC, QFN-20
文件頁數(shù): 12/25頁
文件大小: 892K
代理商: SN74LV245ARGYRG4
SN54LV245A, SN74LV245A
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS382N
SEPTEMBER 1997
REVISED AUGUST 2010
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
The ’LV245A devices are designed for asynchronous communication between data buses. The device
transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are
effectively isolated.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
terminal assignments
12
34
A
A1
DIR
VCC
OE
B
A3
B2
A2
B1
C
A5
A4
B4
B3
D
A7
B6
A6
B5
E
GND
A8
B8
B7
FUNCTION TABLE
INPUTS
OPERATION
OE
DIR
OPERATION
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
logic diagram (positive logic)
DIR
OE
A1
B1
To Seven Other Channels
1
2
19
18
Pin numbers shown are for the DB, DGV, DW, FK, J, NS, PW, RGY, and W packages.
GQN PACKAGE
(TOP VIEW)
12
3
4
A
B
C
D
E
相關(guān)PDF資料
PDF描述
SN74LV245ADWR LV/LV-A/LVX/H SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20
SN74LV245ATPWR LV/LV-A/LVX/H SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20
SN74LV273APWTG4 LV/LV-A/LVX/H SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
SN74LV27ADBR LV/LV-A/LVX/H SERIES, TRIPLE 3-INPUT NOR GATE, PDSO14
SN74LV27ANSR LV/LV-A/LVX/H SERIES, TRIPLE 3-INPUT NOR GATE, PDSO14
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SN74LV245ATDBR 功能描述:總線收發(fā)器 Octal Bus Trnscvr With 3-State Outputs RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN74LV245ATDBRE4 功能描述:總線收發(fā)器 Octal Bus Trnscvr With 3-State Outputs RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN74LV245ATDBRG4 功能描述:總線收發(fā)器 Octal Bus Transceivr RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN74LV245ATDGVR 功能描述:總線收發(fā)器 Octal Bus Trnscvr With 3-State Outputs RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN74LV245ATDGVRE4 功能描述:總線收發(fā)器 8-Channel Analog Mltplxr/Demltplxr RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel