參數(shù)資料
型號(hào): SN74LV221APWG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 諧振器
英文描述: LV/LV-A/LVX/H SERIES, DUAL MONOSTABLE MULTIVIBRATOR, PDSO16
封裝: GREEN, PLASTIC, TSSOP-16
文件頁(yè)數(shù): 12/23頁(yè)
文件大?。?/td> 662K
代理商: SN74LV221APWG4
SN54LV221A, SN74LV221A
DUAL MONOSTABLE MULTIVIBRATORS
WITH SCHMITT TRIGGER INPUTS
SCLS450G DECEMBER 1999 REVISED APRIL 2005
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
The ’LV221A devices are dual multivibrators designed for 2-V to 5.5-V VCC operation. Each multivibrator has
a negative-transition-triggered (A) input and a positive-transition-triggered (B) input, either of which can be used
as an inhibit input.
These edge-triggered multivibrators feature output pulse-duration control by three methods. In the first method,
the A input is low and the B input goes high. In the second method, the B input is high and the A input goes low.
In the third method, the A input is low, the B input is high, and the clear (CLR) input goes high.
The output pulse duration is programmable by selecting external resistance and capacitance values. The
external timing capacitor must be connected between Cext and Rext/Cext(positive) and an external resistor
connected between Rext/Cext and VCC. To obtain variable pulse durations, connect an external variable resistor
between Rext/Cext and VCC. The output pulse duration also can be reduced by taking CLR low.
Pulse triggering occurs at a particular voltage level and is not related directly to the transition time of the input
pulse. The A, B, and CLR inputs have Schmitt triggers with sufficient hysteresis to handle slow input transition
rates with jitter-free triggering at the outputs.
Once triggered, the outputs are independent of further transitions of the A and B inputs and are a function of
the timing components, or the output pulses can be terminated by the overriding clear. Input pulses can be of
any duration relative to the output pulse. Output pulse duration can be varied by choosing the appropriate timing
components. Output rise and fall times are TTL compatible and independent of pulse duration. Typical triggering
and clearing sequences are illustrated in the input/output timing diagram.
The variance in output pulse duration from device to device typically is less than
±0.5% for given external timing
components. An example of this distribution for the ’LV221A is shown in Figure 8. Variations in output pulse
duration versus supply voltage and temperature are shown in Figure 5.
During power up, Q outputs are in the low state, and Q outputs are in the high state. The outputs are glitch free,
without applying a reset pulse.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
Pin assignments are identical to those of the ’AHC123A and ’AHCT123A devices, so the ’LV221A can be
substituted for those devices not using the retrigger feature.
For additional application information on multivibrators, see the application report Designing With The
SN74AHC123A and SN74AHCT123A, literature number SCLA014.
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