參數(shù)資料
型號: SN74CBTD16211DLG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: CBT/FST/QS/5C/B SERIES, DUAL 12-BIT DRIVER, TRUE OUTPUT, PDSO56
封裝: GREEN, PLASTIC, SSOP-56
文件頁數(shù): 6/12頁
文件大?。?/td> 348K
代理商: SN74CBTD16211DLG4
SN74CBTD16211
24-BIT FET BUS SWITCH
WITH LEVEL SHIFTING
SCDS048H – MARCH 1998 – REVISED JULY 2002
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions (see Note 3)
MIN
MAX
UNIT
VCC
Supply voltage
4.5
5.5
V
VIH
High-level control input voltage
2
V
VIL
Low-level control input voltage
0.8
V
TA
Operating free-air temperature
–40
85
°C
In applications with fast edge rates, multiple outputs switching, and operating at high frequencies, the output may have little or no level-shifting
effect.
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIK
VCC = 4.5 V,
II = –18 mA
–1.2
V
VOH
See Figure 2
II
VCC = 5.5 V,
VI = 5.5 V or GND
±1
A
ICC
VCC = 5.5 V,
IO = 0,
VI = VCC or GND
1.5
mA
ICC
Control inputs
VCC = 5.5 V,
One input at 3.4 V,
Other inputs at VCC or GND
2.5
mA
Ci
Control inputs
VI = 3 V or 0
3
pF
Cio(OFF)
VO = 3 V or 0,
OE = VCC
5.5
pF
§
VI =0
II = 64 mA
5
7
ron§
VCC = 4.5 V
VI = 0
II = 30 mA
5
7
VI = 2.4 V,
II = 15 mA
35
50
All typical values are at VCC = 5 V, TA = 25°C.
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
§ Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by
the lowest voltage of the two (A or B) terminals.
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN
MAX
UNIT
tpd
A or B
B or A
0.25
ns
ten
OE
A or B
1.5
9.8
ns
tdis
OE
A or B
1.5
8.9
ns
The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when
driven by an ideal voltage source (zero output impedance).
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