參數(shù)資料
型號: SN74AVC16244DGV
廠商: Texas Instruments, Inc.
英文描述: 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
中文描述: 16位緩沖/驅(qū)動器,三態(tài)輸出
文件頁數(shù): 2/11頁
文件大?。?/td> 258K
代理商: SN74AVC16244DGV
SCES141N JULY 1998 REVISED JULY 2004
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
This 16-bit buffer/driver is operational at 1.2-V to 3.6-V V
CC
, but is designed specifically for 1.65-V to 3.6-V V
CC
operation.
The SN74AVC16244 is designed specifically to improve the performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented receivers and transmitters.
The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and
symmetrical active-low output-enable (OE) inputs.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
terminal assignments
DGG OR DGV PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE
1Y1
1Y2
GND
1Y3
1Y4
V
CC
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
V
CC
4Y1
4Y2
GND
4Y3
4Y4
4OE
2OE
1A1
1A2
GND
1A3
1A4
V
CC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
V
CC
4A1
4A2
GND
4A3
4A4
3OE
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