參數(shù)資料
型號(hào): SN74AS30DBRE4
廠商: TEXAS INSTRUMENTS INC
元件分類: 門電路
英文描述: AS SERIES, 8-INPUT NAND GATE, PDSO14
封裝: GREEN, PLASTIC, SSOP-14
文件頁(yè)數(shù): 14/18頁(yè)
文件大?。?/td> 722K
代理商: SN74AS30DBRE4
PARAMETER MEASUREMENT INFORMATION
tPHZ
tPLZ
tPHL
tPLH
tPZL
tPZH
tPLH
tPHL
LOAD CIRCUIT FOR
3-STATE OUTPUTS
From Output
Under Test
Test
Point
S1
CL = 50 pF
(see Note A)
7 V
3 V
0 V
th
tsu
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing
Input
Data
Input
3 V
0 V
High-Level
Pulse
Low-Level
Pulse
tw
VOLTAGE WAVEFORMS
PULSE DURATIONS
Input
Out-of-Phase
Output
(see Note C)
3 V
0 V
VOL
VOH
VOL
Output
Control
Waveform 1
S1 Closed
(see Note B)
Waveform 2
S1 Open
(see Note B)
≈0 V
VOH
VOL
≈3 V
In-Phase
Output
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
VCC
Test
Point
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT FOR
OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT FOR
BI-STATE TOTEM-POLE OUTPUTS
From Output
Under Test
Test
Point
CL = 50 pF
(see Note A)
500
0.3 V
1.5 V
www.ti.com ........................................................................................................................................................... SDAS010D – APRIL 1982 – REVISED APRIL 2009
A.
CL includes probe and jig capacitance.
B.
Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output
control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the
output control.
C.
When measuring propagation delay items of 3-state outputs, switch S1 is open.
D.
All input pulses have the following characteristics: PRR
≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E.
The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
Copyright 1982–2009, Texas Instruments Incorporated
5
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