參數(shù)資料
型號(hào)： SN74ALVTH16841
廠商： Texas Instruments, Inc.
英文描述： 2.5-V/3.3-V 20-Bit Bus-Interface D-Type Latches(2.5V/3.3V20位總線接口D鎖存器(三態(tài)輸出))
中文描述： 2.5-V/3.3-V 20位總線接口D類閥門（2.5V/3.3V20位總線接口?鎖存器（三態(tài)輸出））
文件頁數(shù)： 6/10頁
文件大?。?/td> 220K
代理商： SN74ALVTH16841
SN54ALVTH16841, SN74ALVTH16841
2.5-V/3.3-V 20-BIT BUS-INTERFACE D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCES077A – JULY 1996 – REVISED JULY 1996
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range,
V
CC
= 3.3 V
±
0.3 V (unless otherwise noted) (see Figure 2)
PARAMETER
TEST CONDITIONS
SN54ALVTH16841
MIN
TYP
SN74ALVTH16841
MIN
TYP
UNIT
MAX
MAX
VIK
VCC = 3 V,
VCC = 3 V to 3.6 V,
II = –18 mA
IOH = –100
μ
A
IOH = – 24 mA
IOH = – 32 mA
IOL = 100
μ
A
IOL = 16 mA
IOL = 24 mA
IOL = 32 mA
IOL = 48 mA
IOL = 64 mA
–1.2
–1.2
V
VOH
VCC–0.2
VCC–0.2
V
VCC= 3 V
VCC = 3 V
2
2
VOL
VCC = 3 V to 3.6 V,
0.2
0.2
V
VCC
3 V
0.4
0.5
0.5
0.55
0.55
±
1
10
II
VCC = 3.6 V, VI = VCC or GND
VCC = 0 or 3.6 V,
Control inputs
±
1
10
VI = 5.5 V
VI = 5.5 V
VI = VCC
VI = 0
VI or VO = 0 to
4.5 V
VI = 0.8 V
VI = 2 V
VI = 0 to 3.6 V
VO = 5.5 V
VCC = 3.6 V
3 6 V
Data inputs
20
20
A
μ
10
10
–5
–5
Ioff
VCC = 0,
±
100
±
100
μ
A
VCC= 3 V
VCC = 3 V
D
i
75
75
A
II(hold)
–75
–75
μ
VCC = 3.6 V,
VCC = 3 V,
VCC
≤
1.2 V, VO = 0.5 V to VCC,
VI = GND or VCC, OE = don’t care
VCC = 3.6 V, VO = 3 V, VI = 0.8 V or 2 V
VCC = 3.6 V, VO = 0.5 V, VI = 0.8 V or 2 V
p
±
500
125
±
500
125
IEX§
μ
A
IOZ(PU/PD)
±
100
±
100
μ
A
IOZH
IOZL
5
5
μ
A
μ
A
–5
–5
ICC
VCC
VI = VCC or GND
3 6 V
IO = 0,
Outputs high
0.07
0.09
0.07
0.09
Outputs low
3.2
5
3.2
5
mA
Outputs
disabled
0.07
0.09
0.07
0.09
ICC#
VCC = 3 V to 3.6 V, One input at VCC –0.6 V,
Other inputs at VCC or GND
VCC = 3.3 V,
VCC = 3.3 V,
All typical values are at VCC = 3.3 V, TA = 25
°
C.
This is the bus-hold maximum dynamic current required to switch the input from one state to another.
§Current into an output in the high state when VO > VCC
High-impedance state during power up/high-impedance state during power down
#This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
0.2
0.2
mA
Ci
Co
VI = 3.3 V or 0
VO = 3.3 V or 0
3
3
pF
9
9
pF
P
相關(guān)PDF資料
PDF描述
SN54ALVTH32373 2.5-V/3.3-V 32-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN54ALVTH32374 2.5-V/3.3-V 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54ALVTHR16245WD 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74ALVTHR16245DGG 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
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SN74ALVTHR16245DL 功能描述:總線收發(fā)器 16-Bit Edg-Trig D-Ty F-F W/3-State Otpt RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
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