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參數(shù)資料
| 型號(hào)： | SN74ALVTH16821DGG |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 2.5-V/3.3-V 20-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| 中文描述： | 2.5-V/3.3-V 20位總線接口倒裝3觸發(fā)器態(tài)輸出 |
| 文件頁(yè)數(shù)： | 2/11頁(yè) |
| 文件大?。?/td> | 196K |
| 代理商： | SN74ALVTH16821DGG |
SN54ALVTH16821, SN74ALVTH16821
2.5-V/3.3-V 20-BIT BUS-INTERFACE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCES078E – JULY 1996 – REVISED JANUARY 1999
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
A buffered output-enable (OE) input can be used to place the ten outputs in either a normal logic state (high
or low level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without
need for interface or pullup components.
OE does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
When V
CC
is between 0 and 1.2 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.2 V, OE should be tied to V
CC
through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN54ALVTH16821 is characterized for operation over the full military temperature range of –55
°
C to
125
°
C. The SN74ALVTH16821 is characterized for operation from –40
°
C to 85
°
C.
FUNCTION TABLE
(each 10-bit section)
INPUTS
OUTPUT
Q
OE
L
CLK
↑
↑
H or L
D
H
H
L
L
L
L
X
Q0
Z
H
X
X
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN74ALVTH16821DGV | 2.5-V/3.3-V 20-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54ALVTH16821 | 2.5-V/3.3-V 20-Bit Bus-Interface Flip-Flops(2.5V/3.3V 20位總線接口觸發(fā)器(三態(tài)輸出)) |
| SN54ALVTH16827 | 2.5-V/3.3-V 20-Bit Buffers/Drivers(2.5V/3.3V 20位緩沖器/驅(qū)動(dòng)器(三態(tài)輸出)) |
| SN54ALVTH16841 | 2.5-V/3.3-V 20-Bit Bus-Interface D-Type Latches(2.5V/3.3V 20位總線接口D鎖存器(三態(tài)輸出)) |
| SN74ALVTH16841 | 2.5-V/3.3-V 20-Bit Bus-Interface D-Type Latches(2.5V/3.3V20位總線接口D鎖存器(三態(tài)輸出)) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74ALVTH16821DL | 功能描述:觸發(fā)器 2.5/3.3V 20bit Univ RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類(lèi)型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類(lèi)型:CMOS 輸出類(lèi)型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74ALVTH16821DLR | 功能描述:觸發(fā)器 2.5/3.3V 20bit Univ RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類(lèi)型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類(lèi)型:CMOS 輸出類(lèi)型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74ALVTH16821GR | 功能描述:觸發(fā)器 2.5/3.3V 20bit Univ RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類(lèi)型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類(lèi)型:CMOS 輸出類(lèi)型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74ALVTH16821VR | 功能描述:觸發(fā)器 2.5/3.3V 20bit Univ RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類(lèi)型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類(lèi)型:CMOS 輸出類(lèi)型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74ALVTH16827DGGR | 制造商:Texas Instruments 功能描述: |
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