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參數資料
| 型號： | SN54ALVTH32373 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 2.5-V/3.3-V 32-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| 中文描述： | 2.5-V/3.3-V 32位透明D型鎖存器具有三態(tài)輸出 |
| 文件頁數： | 3/10頁 |
| 文件大?。?/td> | 183K |
| 代理商： | SN54ALVTH32373 |
SN54ALVTH32373, SN74ALVTH32373
2.5-V/3.3-V 32-BIT TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCES322A – FEBRUARY 2000 – REVISED APRIL 2000
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
logic diagram (positive logic)
1OE
1LE
1D1
To Seven Other Channels
1Q1
C1
1D
A3
A4
A5
A2
2OE
2LE
2D1
To Seven Other Channels
2Q1
C1
1D
H3
H4
E5
E2
3OE
3LE
3D1
To Seven Other Channels
3Q1
C1
1D
J3
J4
J5
J2
4OE
4LE
4D1
To Seven Other Channels
4Q1
C1
1D
T3
T4
N5
N2
NOTE A: 1VCC is associated with these channels.
NOTE B: 2VCC is associated with these channels.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
Input voltage range, V
I
(see Note 1)
Voltage range applied to any output in
the high-impedance
or power-off state, V
O
(see Note 1)
Voltage range applied to any output in the high state, V
O
(see Note 1)
Output current in the low state, I
O
: SN54ALVTH32373
–0.5 V to 4.6 V
–0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–0.5 V to 7 V
–0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . .
96 mA
128 mA
–48 mA
–64 mA
±
100 mA
–50 mA
–50 mA
40
°
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
θ
JA
(see Note 2)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
SN74ALVTH32373
Output current in the high state, I
O
: SN54ALVTH32373
SN74ALVTH32373
Continuous current through V
CC
or GND
Input clamp current, I
IK
(V
I
< 0)
–65
°
C to 150
°
C
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