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參數(shù)資料
| 型號(hào)： | SN54AHCT10 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Triple 3-Input Positive-NAND Gates(三3輸入正與非門(mén)) |
| 中文描述： | 三3輸入正和非門(mén)（三3輸入正與非門(mén)） |
| 文件頁(yè)數(shù)： | 4/5頁(yè) |
| 文件大小： | 104K |
| 代理商： | SN54AHCT10 |
SN54AHCT10, SN74AHCT10
TRIPLE 3-INPUT POSITIVE-NAND GATES
SCLS360 – MAY 1997
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
operating characteristics, V
CC
= 5 V, T
A
= 25
°
C
PARAMETER
TEST CONDITIONS
TYP
UNIT
Cpd
Power dissipation capacitance
No load,
f = 1 MHz
14
pF
PARAMETER MEASUREMENT INFORMATION
LOAD CIRCUIT
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
3 V
0 V
Input
(see Note B)
Out-of-Phase
Output
In-Phase
Output
VOLTAGE WAVEFORMS
DELAY TIMES
Test
Point
CL
(see Note A)
From Output
Under Test
1.5 V
1.5 V
50% VCC
NOTES: A. CL includes probe and jig capacitance.
B. Input pulses are supplied by generators having the following characteristics: PRR
≤
1 MHz, ZO = 50
, tr = 3 ns, tf = 3 ns.
C. The outputs are measured one at a time with one input transition per measurement.
50% VCC
50% VCC
50% VCC
Figure 1. Load Circuit and Voltage Waveforms
P
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