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參數(shù)資料
| 型號： | SN54ACT1284FK |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 7-BIT BUS INTERFACES WITH 3-STATE OUTPUTS |
| 中文描述： | 7位總線接口與三態(tài)輸出 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 93K |
| 代理商： | SN54ACT1284FK |
SN54ACT1284, SN74ACT1284
7-BIT BUS INTERFACES
WITH 3-STATE OUTPUTS
SCAS459B – NOVEMBER 1994 – REVISED APRIL 1996
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
3-State Outputs Directly Drive Bus Lines
Flow-Through Architecture Optimizes PCB
Layout
Center-Pin V
CC
and GND Configurations
Minimize High-Speed Switching Noise
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Designed for the IEEE 1284-I (Level 1 Type)
and IEEE 1284-II (Level 2 Type) Electrical
Specifications
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), and
DIP (N) Packages, Ceramic Chip Carriers
(FK), Flat (W), and DIP (J) Packages
description
The ’ACT1284 are designed for asynchronous
two-way communication between data buses.
The control function minimizes external timing
requirements.
The devices allow data transmission in either the
A-to-B or the B-to-A direction for bits 1, 2, 3, and
4, depending on the logic level at the
direction-control (DIR) input. Bits 5, 6, and 7,
however, always transmit in the A-to-B direction.
The output drive for each mode is determined by the high drive (HD) control pin. When HD is high, the high drive
is delivered by the totem-pole configuration, and when HD is low, the outputs are open drain. This meets the
drive requirements as specified in the IEEE 1284-I (level 1 type) and the IEEE 1284-II (level 2 type) parallel
peripheral-interface specification.
The SN54ACT1284 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C.
The SN74ACT1284 is characterized for operation from 0
°
C to 70
°
C.
FUNCTION TABLE
INPUTS
OUTPUT
MODE
DIR
HD
L
L
Open drain
A to B: Bits 5, 6, 7
Totem pole
B to A: Bits 1, 2, 3, 4
L
H
Totem pole
B to A: Bits 1, 2, 3, 4 and A to B: Bits 5, 6, 7
H
L
Open drain
A to B: Bits 1, 2, 3, 4, 5, 6, 7
H
H
Totem pole
A to B: Bits 1, 2, 3, 4, 5, 6, 7
Copyright
1996, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
A1
A2
A3
A4
GND
GND
A5
A6
A7
DIR
B1
B2
B3
B4
V
CC
V
CC
B5
B6
B7
HD
SN54ACT1284 . . . J OR W PACKAGE
SN74ACT1284 . . . DB, DW, N, OR PW PACKAGE
(TOP VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
B3
B4
V
CC
V
CC
B5
A4
GND
GND
A5
A6
FK PACKAGE
(TOP VIEW)
A
A
A
B
B
B
A
D
H
B
相關PDF資料 |
PDF描述 |
|---|---|
| SN74ACT1284DB | Low-Voltage CMOS 16-Bit Transceiver; Package: TSSOP-48 12.5x6.1x1.1 mm; No of Pins: 48; Container: Tape and Reel; Qty per Container: 2500 |
| SN74ACT1284N | Low-Voltage CMOS 16-Bit Transparent Latch; Package: TSSOP-48 12.5x6.1x1.1 mm; No of Pins: 48; Container: Tape and Reel; Qty per Container: 2500 |
| SN74ACT1284PW | Low-Voltage CMOS 16-Bit D-Type Flip-Flop; Package: TSSOP-48 12.5x6.1x1.1 mm; No of Pins: 48; Container: Rail; Qty per Container: 39 |
| SN54ACT1284J | 7-BIT BUS INTERFACES WITH 3-STATE OUTPUTS |
| SN54ACT1284W | 7-BIT BUS INTERFACES WITH 3-STATE OUTPUTS |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SN54ACT1284J | 制造商:TI 制造商全稱:Texas Instruments 功能描述:7-BIT BUS INTERFACES WITH 3-STATE OUTPUTS |
| SN54ACT1284W | 制造商:TI 制造商全稱:Texas Instruments 功能描述:7-BIT BUS INTERFACES WITH 3-STATE OUTPUTS |
| SN54ACT14 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:HEX SCHMITT-TRIGGER INVERTER |
| SN54ACT14FK | 制造商:TI 制造商全稱:Texas Instruments 功能描述:HEX SCHMITT-TRIGGER INVERTER |
| SN54ACT14J | 制造商:TI 制造商全稱:Texas Instruments 功能描述:HEX SCHMITT-TRIGGER INVERTER |
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