參數(shù)資料
型號: SN54AC16374
廠商: Texas Instruments, Inc.
英文描述: 16-Bit Edge-Triggered D-type Flip-Flops With 3-State Outputs(16上升沿D觸發(fā)器(三態(tài)輸出))
中文描述: 16位邊沿觸發(fā)D型觸發(fā)器與3正反器態(tài)輸出(16上升沿?觸發(fā)器(三態(tài)輸出))
文件頁數(shù): 5/7頁
文件大?。?/td> 181K
代理商: SN54AC16374
54AC16374, 74AC16374
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCAS123B – MARCH 1990 – REVISED APRIL 1996
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range
V
CC
= 3.3 V
±
0.3 V (unless otherwise noted) (see Figure 1)
TA = 25
°
C
MIN
54AC16374
MIN
74AC16374
MIN
UNIT
MAX
MAX
MAX
fclock
tw
tsu
th
Clock frequency
0
60
0
60
0
60
MHz
Pulse duration
Setup time, data before CLK
Hold time, data after CLK
CLK high or low
8.3
8.3
8.3
ns
7.5
7.5
7.5
ns
0
0
0
ns
timing requirements over recommended operating free-air temperature range
V
CC
= 5 V
±
0.5 V (unless otherwise noted) (see Figure 1)
TA = 25
°
C
MIN
54AC16374
MIN
74AC16374
MIN
UNIT
MAX
MAX
MAX
fclock
tw
tsu
th
Clock frequency
0
100
0
100
0
100
MHz
Pulse duration
Setup time, data before CLK
Hold time, data after CLK
CLK high or low
5
5
5
ns
5
5
5
ns
0
0
0
ns
switching characteristics over recommended operating free-air temperature range
V
CC
= 3.3 V
±
0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
TA = 25
°
C
TYP
54AC16374
74AC16374
UNIT
(OUTPUT)
MIN
MAX
MIN
MAX
MIN
MAX
fmax
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
60
60
60
MHz
CLK
Q
4.9
12.2
15
4.9
17
4.9
17
ns
4.8
11.9
14.3
4.8
15.7
4.8
15.7
OE
Q
4.3
11.9
14.7
4.3
16.8
4.3
16.8
ns
5.3
15.5
18.7
5.3
21.2
5.3
21.2
OE
Q
4
7.3
9
4
9.8
4
9.8
ns
3.8
7.1
8.8
3.8
9.4
3.8
9.4
switching characteristics over recommended operating free-air temperature range
V
CC
= 5 V
±
0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
TA = 25
°
C
TYP
54AC16374
74AC16374
UNIT
(OUTPUT)
MIN
MAX
MIN
MAX
MIN
MAX
fmax
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
100
100
100
MHz
CLK
Q
3.8
7.6
9.5
3.8
10.8
3.8
10.8
ns
3.8
7.6
9.5
3.8
10.6
3.8
10.6
OE
Q
3.2
7.2
9
3.2
10.2
3.2
10.2
ns
3.8
8.7
10.7
3.8
12.1
3.8
12.1
OE
Q
3.7
6
7.5
3.7
8.2
3.7
8.2
ns
3.5
5.8
7.3
3.5
7.9
3.5
7.9
operating characteristics, V
CC
= 5 V, T
A
= 25
°
C
PARAMETER
TEST CONDITIONS
TYP
49
UNIT
Cpd
Power dissipation capacitance per flip-flop
Outputs enabled
CL= 50 pF
CL = 50 pF,
f = 1 MHz
pF
Outputs disabled
32
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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