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參數(shù)資料
| 型號(hào)： | SN54ABTH32501PZ |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 36-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| 中文描述： | 36位通用總線收發(fā)3態(tài)輸出 |
| 文件頁(yè)數(shù)： | 3/9頁(yè) |
| 文件大?。?/td> | 135K |
| 代理商： | SN54ABTH32501PZ |
SN54ABTH32501, SN74ABTH32501
36-BIT UNIVERSAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS229F – JUNE 1992 – REVISED MAY 1997
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description
These 36-bit UBTs combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and
clocked modes.
Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA),
and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when
LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is
low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. Data flow for B to A is similar
to that of A to B, but uses OEBA, LEBA, and CLKBA.
Output-enable OEAB is active high. When OEAB is high, the outputs are active. When OEAB is low, the outputs
are in the high-impedance state. The output enables are complementary (OEAB is active high, and OEBA is
active low).
When V
CC
is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 2.1 V, OE should be tied to V
CC
through a pullup resistor
and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by
the current-sinking/current-sourcing capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN54ABTH32501 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C.
The SN74ABTH32501 is characterized for operation from –40
°
C to 85
°
C.
FUNCTION TABLE
INPUTS
LEAB
OUTPUT
B
OEAB
CLKAB
A
L
X
X
X
Z
H
H
X
L
L
H
H
X
↑
↑
H
H
H
H
L
L
L
H
L
H
H
H
L
X
B0
B0§
H
L
L
X
A-to-B data flow is shown: B-to-A flow is similar, but
uses OEBA, LEBA, and CLKBA.
Output level before the indicated steady-state input
conditions were established
§Output level before the indicated steady-state input
conditions were established, provided that CLKAB
was low before LEAB went low
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| SN54ABTH32543 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:36-BIT REGISTERED BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| SN54ABTH32543HS | 制造商:TI 制造商全稱:Texas Instruments 功能描述:36-BIT REGISTERED BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| SN54ABTH32543PZ | 制造商:TI 制造商全稱:Texas Instruments 功能描述:36-BIT REGISTERED BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
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| SN54ABTR2245FK | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL TRANSCEIVERS AND LINE/MEMORY DRIVERS WITH 3-STATE OUTPUTS |
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