參數(shù)資料
型號(hào): SI5350B-A-GT
廠(chǎng)商: Silicon Laboratories Inc
文件頁(yè)數(shù): 3/24頁(yè)
文件大小: 0K
描述: IC CLK GEN PLL BLANK CUST 10MSOP
標(biāo)準(zhǔn)包裝: 50
系列: MultiSynth™
類(lèi)型: *
PLL:
輸入: 晶體
輸出: CMOS
電路數(shù): 1
比率 - 輸入:輸出: 1:3
差分 - 輸入:輸出: 無(wú)/無(wú)
頻率 - 最大: 133MHz
除法器/乘法器: 是/無(wú)
電源電壓: 2.25 V ~ 3.63 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 管件
Si5350B
Rev. 0.9
11
4. Configuring the Si5350B
based utility (www.silabs.com/ClockBuilder). The ClockBuilder utility provides a simple graphical interface that
allows the user to enter input and output frequencies along with other custom features as described in the following
sections. All synthesis calculations are automatically performed by ClockBuilder to ensure an optimum
configuration. A unique part number is assigned to each custom configuration.
4.1. Crystal Inputs (XA, XB)
The Si5350B uses a fixed-frequency non-pullable standard AT-cut crystal as a reference to synthesize its output
clocks and to provide the frequency stability for the VCXO.
4.1.1. Crystal Frequency
The Si5350B can operate using either a 25 MHz or a 27 MHz crystal.
4.1.2. Internal XTAL Load Capacitors
Internal load capacitors (CL) are provided to eliminate the need for external components when connecting a XTAL
to the Si5350B. Options for internal load capacitors are 6, 8, or 10 pF. XTALs with alternate load capacitance
requirements are supported using external load capacitors < 2 pF as shown in Figure 5.
Figure 5. External XTAL with Optional Load Capacitors
4.2. Output Clocks (CLK0–CLK7)
The Si5350B is orderable as a 3-output (10-MSOP) or 8-output (24-QSOP, 20-QFN) clock generator. Output clocks
CLK0 to CLK5 can be ordered with two clock frequencies (F1_x, F2_x) which are selectable with the optional
frequency select pins (FS0/1). See “4.3.2. Frequency Select (FS_0, FS_1)” for more details on the operation of the
frequency select pins. Each output clock can select its reference either from the PLL or from the VCXO.
4.2.1. Output Clock Frequency
Outputs can be configured at any frequency from 8 kHz up to 100 MHz. In addition, the device can generate any
two non-integer related frequencies up to 160 MHz. See “AN554: Si5350/51 PCB Layout Guide” for details.
4.2.2. .Spread Spectrum
Spread spectrum can be enabled on any of the clock outputs that use PLLA as its reference. Spread spectrum is
useful for reducing electromagnetic interference (EMI). Enabling spread spectrum on an output clock modulates its
frequency, which effectively reduces the overall amplitude of its radiated energy. See AN554 for details. Note that
spread spectrum is not available on clocks synchronized to PLLB or to the VCXO.
The Si5350B supports several levels of spread spectrum allowing the designer to choose an ideal compromise
between system performance and EMI compliance. An optional spread spectrum enable pin (SSEN) is
configurable to enable or disable the spread spectrum feature. See “4.3.1. Spread Spectrum Enable (SSEN)” for
details.
XA
XB
Optional internal
load capacitors
6 pF, 8 pF, 10 pF
CL
Optional additional
external load
capacitors
(< 2 pF)
CL
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SI5350B-A-GTR 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Any-Rate Dual PLL 133MHz Clk VCXO RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
Si5350B-A-GU 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 AnyRate 2 PLL 125MHz Clk w/VCXO 8 outputs RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
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Si5350B-Axxxxx-GM 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Any-Rate, Dual PLL 133MHz Clock with VCXO , 8 outputs, 20-QFN (customized) RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
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