參數(shù)資料
型號: SI5334C-A00132-GMR
廠商: SILICON LABORATORIES
元件分類: 時鐘及定時
英文描述: PLL BASED CLOCK DRIVER, QCC24
封裝: 4 X 4 MM, ROHS COMPLIANT, MO-220VGGD-8, QFN-24
文件頁數(shù): 10/34頁
文件大?。?/td> 233K
代理商: SI5334C-A00132-GMR
Si5334
18
Preliminary Rev. 0.16
3. Pin Descriptions—Si5334
Note: Center pad must be tied to GND for normal operation.
Table 15. Si5334 Pin Descriptions
Pin #
Pin Name
I/O
Signal Type
Description
1,2
IN1/IN2
I
Multi
CLKIN/CLKINB.
These pins are used as the main differential clock input
or as the XTAL input. Clock inputs to these pins must be
ac-coupled. A crystal should be directly connected to
pins 1,2 with the shortest traces possible. Keep the
traces from pins 1,2 to the crystal as short as possible
and keep other signals and radiating sources away from
the crystal.
When not in use, leave IN1 unconnected and IN2
connected to GND.
IN1
CLK2B
CLK2A
VDDO2
VDDO1
CLK1B
CLK1A
VDD
IN6
IN5
IN4
IN3
IN2
VDD
IN7
CL
K3A
CLK
3
B
LOS
L
OL
OE
B
VDDO0
CLK
0B
CLK0
A
RSV
D
_
G
ND
VDDO3
GND
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