- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98080 > SI5334C-A00115-GM (SILICON LABORATORIES) PLL BASED CLOCK DRIVER, QCC24 PDF資料下載
參數(shù)資料
| 型號： | SI5334C-A00115-GM |
| 廠商： | SILICON LABORATORIES |
| 元件分類： | 時鐘及定時 |
| 英文描述： | PLL BASED CLOCK DRIVER, QCC24 |
| 封裝： | 4 X 4 MM, ROHS COMPLIANT, MO-220VGGD-8, QFN-24 |
| 文件頁數(shù)： | 32/34頁 |
| 文件大小： | 233K |
| 代理商： | SI5334C-A00115-GM |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁當前第32頁第33頁第34頁
Si5334
Preliminary Rev. 0.16
7
Table 6. Input and Output Clock Characteristics
(VDD = 1.8 V –5% to +10%, 2.5 V ±10%, or 3.3 V ±10%, TA = –40 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Input Clock (AC Coupled Differential Input Clocks on Pins IN1/2, IN5/6)
Frequency
fIN
5
—
710
MHz
Differential Voltage
Swing
VPP
710 MHz input
0.4
—
2.4
VPP
Rise/Fall Time
tR/tF
20%–80%
—
1.0
ns
Duty Cycle1
DC
< 1 ns tr/tf
40
—
60
%
Input Impedance
RIN
10
—
k
Input Capacitance
CIN
—3.5
—
pF
Input Clock (DC-Coupled Single-Ended Input Clock on Pins IN3/4)
Frequency
fIN
CMOS
5
—
200
MHz
Input Voltage
VI
–0.1
—
3.63
Vpp
Input Voltage Swing
200 MHz
0.8
—
3.73
V
Rise/Fall Time
tR/tF
20%–80%
—
2
ns
Duty Cycle2
DC
< 2 ns tr/tf
40
—
60
%
Input Capacitance
CIN
—2.0
—
pF
Output Clocks (Differential)
Frequency3
fOUT
LVPECL, LVDS
0.16
—
350
MHz
367
—
466
MHz
550
—
710
MHz
HCSL
0.16
—
250
MHz
LVPECL Output
Voltage
VOC
common mode
—
VDDO –
1.4 V
—V
VSEPP
peak-to-peak single-
ended swing
0.55
0.8
0.96
VPP
LVDS Output Voltage
(2.5/3.3 V)
VOC
common mode
1.125
1.2
1.275
V
VSEPP
peak-to-peak single-
ended swing
0.25
0.35
0.45
VPP
LVDS Output
Voltage (1.8 V)
VOC
common mode
0.8
0.875
0.95
V
VSEPP
peak-to-peak single-
ended swing
0.25
0.35
0.45
VPP
Notes:
1. For best jitter performance, keep the input slew rate on IN1/2, IN5/6 faster than 0.3 V/ns.
2. For best jitter performance, keep the input single ended slew rate on pins 3 or 4 faster than 1 V/ns.
3. Only two unique frequencies above Fvco/8 can be simultaneously output, Fvco/4 and Fvco/6.
4. Includes effect of internal series 22
resistor.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SI5334C-A00120-GMR | PLL BASED CLOCK DRIVER, QCC24 |
| SI5334C--A00104-GM | PLL BASED CLOCK DRIVER, QCC24 |
| SI5334C-A00112-GMR | PLL BASED CLOCK DRIVER, QCC24 |
| SI5334C-A00114-GMR | PLL BASED CLOCK DRIVER, QCC24 |
| SI5334B-A00156-GMR | PLL BASED CLOCK DRIVER, QCC24 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SI5334C-A00115-GMR | 制造商:Silicon Laboratories Inc 功能描述:CLOCK - Tape and Reel |
| SI5334C-A00116-GM | 制造商:Silicon Laboratories Inc 功能描述:CLOCK - Rail/Tube |
| SI5334C-A00116-GMR | 制造商:Silicon Laboratories Inc 功能描述:CLOCK - Tape and Reel |
| SI5334C-A00118-GM | 制造商:Silicon Laboratories Inc 功能描述:CLOCK - Rail/Tube |
| SI5334C-A00118-GMR | 制造商:Silicon Laboratories Inc 功能描述:CLOCK - Tape and Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復。