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參數(shù)資料
| 型號： | SI5315A-C-GM |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 26/54頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLK MULT 8KHZ-644.53MHZ 36QFN |
| 應用說明： | SI5315/17 Crystal Selection AppNote |
| 標準包裝： | 490 |
| 系列： | DSPLL® |
| 類型： | 時鐘/頻率倍增器，抖動衰減器，多路復用器 |
| PLL： | 無 |
| 主要目的： | 以太網(wǎng)，SONET/SDH/PDH，電信 |
| 輸入： | CML，CMOS，LVDS，LVPECL |
| 輸出： | CML，CMOS，LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:2 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 644.53MHz |
| 電源電壓： | 1.71 V ~ 3.63 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 36-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 36-QFN（6x6） |
| 包裝： | 托盤 |
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Si5315
32
Rev. 1.0
5.5. Holdover Mode
If an LOS condition exists on the selected input clock, the device enters holdover. In this mode, the device provides
a stable output frequency until the input clock returns and is validated. When the device enters holdover, the
internal oscillator is initially held to its last frequency value. Next, the internal oscillator slowly transitions to a
historical average frequency value that was taken over a time window of 6,711 ms in size that ended 26 ms before
the device entered holdover. This frequency value is taken from an internal memory location that keeps a record of
previous DSPLL frequency values. By using a historical average frequency, input clock phase and frequency
transients that may occur immediately preceding loss of clock or any event causing holdover do not affect the
holdover frequency. Also, noise related to input clock jitter or internal PLL jitter is minimized.
If a highly stable reference, such as an oven-controlled crystal oscillator, is supplied at XA/XB, an extremely stable
holdover can be achieved. If a crystal is supplied at the XA/XB port, the holdover stability will be limited by the
stability of the crystal; Table 3, “AC Characteristics” gives the specifications related to the holdover function.
5.5.1. Recovery from Holdover
When the input clock signal returns, the device transitions from holdover to the selected input clock. The device
performs hitless recovery from holdover. The clock transition from holdover to the returned input clock includes
"phase buildout" to absorb the phase difference between the holdover clock phase and the input clock phase. See
Table 3, “AC Characteristics” for specifications.
5.6. PLL Bypass Mode
The Si5315 supports a PLL bypass mode in which the selected input clock is fed directly to both enabled output
buffers, bypassing the DSPLL. Internally, the bypass path is implemented with high-speed differential signaling;
however, this path is not a low jitter path and will see significantly higher jitter on CKOUT. In PLL bypass mode, the
input and output clocks will be at the same frequency. PLL bypass mode is useful in a laboratory environment to
measure system performance with and without the jitter attenuation provided by the DSPLL. The DSBL2_BY pin is
used to select the PLL Bypass Mode according to Table 16. Bypass mode is not supported for CMOS clock outputs
(SFOUT = LH).
Table 15. Lock Detect Retrigger Time
PLL Bandwidth Setting (BW)
Retrigger Time (ms)
60–120 Hz
53
120–240 Hz
26.5
240–480 Hz
13.3
480–960 Hz
6.6
960–1920 Hz
3.3
1920–3840 Hz
1.66
3840–7680 Hz
0.833
Table 16. DSBL2/BYPASS Pin Settings
DSBL2/BYPASS
Function
L
CKOUT2 Enabled
M
CKOUT2 Disabled
H
PLL Bypass Mode w/ CKOUT2 Enabled
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SI5315A-C-GMR | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Pin-Ctrl SyncE Clk Xplier/Jitt Attn 2/2 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| Si5315B-C-GM | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Pin-Prgrmmbl SyncE Clck Mlt/Jttr Attntr RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SI5315B-C-GMR | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Pin-Ctrl SyncE Clk Xplier/Jitt Attn 2/2 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SI5315-C | 制造商:AUK 制造商全稱:AUK corp 功能描述:IRED |
| SI5315-C(B) | 制造商:AUK 制造商全稱:AUK corp 功能描述:IRED |
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