參數(shù)資料
型號(hào): SI4713-B30-GMR
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 23/42頁(yè)
文件大?。?/td> 430K
描述: IC TX FM RADIO RPS/RDS 20UQFN
標(biāo)準(zhǔn)包裝: 2,500
頻率: 76MHz ~ 108MHz
應(yīng)用: 通用
調(diào)制或協(xié)議: FM
電流 - 傳輸: 18.8mA
數(shù)據(jù)接口: PCB,表面貼裝
天線連接器: PCB,表面貼裝
電源電壓: 2.7 V ~ 5.5 V
封裝/外殼: 20-UFQFN 裸露焊盤(pán)
包裝: 帶卷 (TR)
Si4712/13-B30
Rev. 1.1
23
5.4. Digital Audio Interface
The digital audio interface operates in slave mode and
supports 3 different audio data formats:
1.  I
2
S
2.  Left-Justified
3.  DSP Mode
5.4.1. Audio Data Formats
In I
2
S mode, the MSB is captured on the second rising
edge of DCLK following each DFS transition. The
remaining bits of the word are sent in order, down to the
LSB. The Left Channel is transferred first when the DFS
is low, and the Right Channel is transferred when the
DFS is high.
In Left-Justified mode, the MSB is captured on the first
rising edge of DCLK following each DFS transition. The
remaining bits of the word are sent in order, down to the
LSB. The Left Channel is transferred first when the DFS
is high, and the Right Channel is transferred when the
DFS is low.
In DSP mode, the DFS becomes a pulse with a width of
1 DCLK period. The Left Channel is transferred first,
followed right away by the Right Channel. There are two
options in transferring the digital audio data in DSP
mode: the MSB of the left channel can be transferred on
the first rising edge of DCLK following the DFS pulse or
on the second rising edge.
In all audio formats, depending on the word size, DCLK
frequency and sample rates, there may be unused
DCLK cycles after the LSB of each word before the next
DFS transition and MSB of the next word.
The number of audio bits can be configured for 8, 16,
20, or 24 bits.
5.4.2. Audio Sample Rates
The device supports a number of industry-standard
sampling rates including 32, 40, 44.1, and 48 kHz. The
digital audio interface enables low-power operation by
eliminating the need for redundant DACs and ADCs on
the audio baseband processor. The sampling rate is
selected using the DIGITAL_INPUT_SAMPLE_RATE
property.
The device supports DCLK frequencies above 1 MHz.
After powerup the DIGITAL_INPUT_SAMPLE_RATE
property defaults to 0 (disabled). After DCLK is
supplied,     the     DIGITAL_INPUT_SAMPLE_RATE
property should be set to the desired audio sample rate
such    as    32,    40,    44.1,    or    48 kHz.    The
DIGITAL_INPUT_SAMPLE_RATE property must be set
to 0 before DCLK is removed or the DCLK frequency
drops below 1 MHz. A device reset is required if this
requirement is not followed.
相關(guān)PDF資料
PDF描述
SKY12146-321LF IC VAR VOLT ATTEN 12QFN
SN171GG-NR SNAP PROTOBOARD W/NO RADIO
SWLP.2450.12.4.B.02 ANTENNA WI-FI WLAN 2.4GHZ
TD4A SENSOR RTD LIQUID TEMP 2TERM
TD5A SENSOR RTD TEMP MINI 3LEAD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SI4713-B-EVB 功能描述:射頻開(kāi)發(fā)工具 SI4713 EVAL BOARD REV B RoHS:否 制造商:Taiyo Yuden 產(chǎn)品:Wireless Modules 類(lèi)型:Wireless Audio 工具用于評(píng)估:WYSAAVDX7 頻率: 工作電源電壓:3.4 V to 5.5 V
SI4714DY 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:N-Channel 30 V (D-S) MOSFET with Schottky Diode
Si4714DY-T1-GE3 功能描述:MOSFET 30 Volts 13.6 Amps 4.5 Watts RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS(導(dǎo)通):0.014 Ohms 配置:Single 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:Max247 封裝:Tube
SI4719CY 功能描述:電源開(kāi)關(guān) IC - 配電 P-Ch Battery Switch RoHS:否 制造商:Exar 輸出端數(shù)量:1 開(kāi)啟電阻(最大值):85 mOhms 開(kāi)啟時(shí)間(最大值):400 us 關(guān)閉時(shí)間(最大值):20 us 工作電源電壓:3.2 V to 6.5 V 電源電流(最大值): 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOT-23-5
SI4719CY-E3 功能描述:電源開(kāi)關(guān) IC - 配電 P-Ch Battery Switch RoHS:否 制造商:Exar 輸出端數(shù)量:1 開(kāi)啟電阻(最大值):85 mOhms 開(kāi)啟時(shí)間(最大值):400 us 關(guān)閉時(shí)間(最大值):20 us 工作電源電壓:3.2 V to 6.5 V 電源電流(最大值): 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOT-23-5