參數(shù)資料
型號： SI3216MDC1-EVB
廠商： Silicon Laboratories Inc
文件頁數(shù)： 8/122頁
文件大?。?/td> 0K
描述： DAUGHTER CARD W/SI3201 INTERFACE
標準包裝： 1
Si3216
Rev. 1.0
105
Not
Recommended
fo
r N
ew
D
esi
gn
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4.2. Digital Programmable Gain/Attenuation
See functional description sections of digital programmable gain/attenuation for guidelines on computing register
values. All values are represented in 2s-complement format.
Note: The values of all indirect registers are undefined following the reset state. Shaded areas denote bits that can be read
and written but should be written to zeros.
7
RCO[15:0]
8
RNGX[15:0]
9
RNGY[15:0]
Table 37. Oscillator Indirect Registers Description
Addr.
Description
Reference
Page
0
Oscillator 1 Frequency Coefficient.
Sets tone generator 1 frequency.
1
Oscillator 1 Amplitude Register.
Sets tone generator 1 signal amplitude.
2
Oscillator 1 Initial Phase Register.
Sets initial phase of tone generator 1 signal.
3
Oscillator 2 Frequency Coefficient.
Sets tone generator 2 frequency.
4
Oscillator 2 Amplitude Register.
Sets tone generator 2 signal amplitude.
5
Oscillator 2 Initial Phase Register.
Sets initial phase of tone generator 2 signal.
6
Ringing Oscillator DC Offset.
Sets dc offset component (VTIP–VRING) to ringing waveform. The range is 0 to 94.5 V in
1.5 V increments.
7
Ringing Oscillator Frequency Coefficient.
Sets ringing generator frequency.
8
Ringing Oscillator Amplitude Register.
Sets ringing generator signal amplitude.
9
Ringing Oscillator Initial Phase Register.
Sets initial phase of ringing generator signal.
Table 38. Digital Programmable Gain/Attenuation Indirect Registers Summary
Addr. D15
D14
D13
D12
D11
D10
D9
D8D7D6D5D4D3D2D1
D0
13
DACG[11:0]
14
ADCG[11:0]
Table 36. Oscillator Indirect Registers Summary (Continued)
Addr. D15
D14
D13
D12
D11
D10
D9
D8D7D6D5D4D3D2D1
D0
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