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參數(shù)資料
| 型號： | SI3210M-GT |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 90/148頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SLIC/CODEC PROG 1CH 38TSSOP |
| 標準包裝： | 50 |
| 系列： | ProSLIC® |
| 功能： | 用戶線路接口概念（SLIC），CODEC |
| 接口： | PCM，SPI |
| 電路數(shù)： | 1 |
| 電源電壓： | 3.3V，5V |
| 電流 - 電源： | 88mA |
| 功率（瓦特）： | 700mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 38-TFSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 38-TSSOP |
| 包裝： | 管件 |
| 包括： | BORSCHT 功能，DTMF 生成和解碼，F(xiàn)SK 生成，脈沖測量生成，語音回送測試模式 |
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Si3210/Si3211
46
Rev. 1.61
Not
Recommended
fo
r N
ew
D
esi
gn
s
where:
NREN is the ringing REN load (max value = 5),
IOS is the offset current flowing in the line driver circuit
(max value=2mA), and
VAC,PK = amplitude of the ac ringing waveform.
It is good practice to provide a buffer of a few more
milliamperes for ILOAD,PK to account for possible line
leakages, etc. The total ILOAD,PK current should be
smaller than 80 mA.
where
is the minimum expected current gain of
transistors Q5 and Q6.
The minimum value for VBATH is therefore given by the
following:
The ProSLIC is designed to create a fully-balanced
ringing waveform, meaning that the TIP and RING
common mode voltage, (VTIP + VRING)/2, is fixed. This
voltage
is
referred
to
as
VCM_RING
and
is
automatically set to the following:
VCMR is an indirect register, which provides the
headroom by the ringing waveform with respect to the
VBATH rail. The value is set as a 4-bit setting in indirect
Register 40
with
an
LSB
voltage
of
1.5 V/LSB.
Register 40 should be set with the calculated VOVR to
provide voltage headroom during ringing.
Silicon revisions C and higher support the option to
briefly increase the maximum differential current limit
between the voltage transition of TIP and RING from
ringing to a dc linefeed state. This mode is enabled by
setting ILIMEN = 1 (direct Register 108, bit 7).
2.4.6. Ring Trip Detection
A ring trip event signals that the terminal equipment has
gone off-hook during the ringing state. The ProSLIC
performs ring trip detection digitally using its on-chip A/
D
converter.
The
functional
blocks
required
to
implement ring trip detection are shown in Figure 23.
The primary input to the system is the loop current
sense (LCS) value provided by the current monitoring
circuitry and reported in direct Register 79. LCS data is
processed by the input signal processor when the
ProSLIC is in the ringing state as indicated by the
Linefeed Shadow register (direct Register 64). The data
then feeds into a programmable digital low-pass filter
that removes unwanted ac signal components before
threshold detection.
The output of the low-pass filter is compared to a
programmable threshold, RPTP (indirect Register 29).
The threshold comparator output feeds a programmable
debouncing filter. The output of the debouncing filter
remains in its present state unless the input remains in
the opposite state for the entire period of time
programmed
by
the
ring
trip
debounce
interval,
RTDI[6:0] (direct Register 70). If the debounce interval
has been satisfied, the RTP bit of direct Register 68 will
be set to indicate that a valid ring trip has occurred. A
ring trip interrupt is generated if enabled by the RTIE bit
(direct Register 22). Table 31 lists the registers that
must be written or monitored to correctly detect a ring
trip condition.
The recommended values for RPTP, NRTP, and RTDI
vary according to the programmed ringing frequency.
Register values for various ringing frequencies are
given in Table 32.
Figure 23. Ring Trip Detector
V
OVR
I
LOAD,PK
1
+
-------------
80.6
1V
+
=
VBATH
V
AC,PK
V
ROFF
V
OVR
++
=
VCM_RING
VBATH
VCMR
–
2
----------------------------------------------
=
LCS
ISP_OUT
LFS
NRTP
RPTP
RTDI
Input
Signal
Processor
Digital
LPF
Ring Trip
Threshold
Debounce
Filter
+
–
RTP
RTIP
RTIE
Interrupt
Logic
DBIRAW
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