參數(shù)資料
型號: SDA 5254
廠商: SIEMENS AG
英文描述: TVTEXT 8-Bit Microcontroller(ROM-Versions )(TV視頻的8位微控制器(含ROM 型 ))
中文描述: TVTEXT 8位微控制器(ROM的版本)(電視視頻的8位微控制器(含光盤型))
文件頁數(shù): 16/143頁
文件大?。?/td> 1050K
代理商: SDA 5254
SDA 525x
Semiconductor Group
16
1998-04-08
6
Functional Description
6.1
Acquisition
6.1.1
The slicer extracts horizontal and vertical sync information and TTX data from the CVBS
signal. The slicer includes an analog circuit for sync filtering and data slicing. Further
there are two analog PLLs for system clock generation for both TTX and VPS. Therefore
the slicer is able to receive both TTX and VPS in succeeding lines of a vertical blanking
interval. A third data-PLL shifts the phase of the system clock for data sampling. The
internal slicer timing signals are generated from the VPS-PLL.
TTX/VPS Slicer
6.1.2
The acquisition hardware transforms the sliced bit stream into a byte stream. A framing
code check follows to identify a TTX or VPS line. If the framing code error tolerance is
enabled then one-bit errors will be allowed.
For each line in the VBI in which a framingcode is detected, a maximum of 42 bytes
(VPS: 26 bytes) plus a status word are stored in the VBI-buffer. After framing code
detection a status word is generated which informs about the type of data received (TTX
or VPS) and the signal quality of the TV channel.
on page 17
shows the format of this status word. The horizontal and vertical windows in
which TTX or VPS data are accepted and checked for framing code errors are generated
automatically. The VBI buffer data will be analyzed (Hamming, parity and acquisition) by
the microcontroller and stored in the dual port display RAM or the external RAM, if
selected. This analysis is repeated for every field.
Acquisition Hardware
Chapter “Acquisition Status Word”
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