參數(shù)資料
型號: SAF-XC164N-8F20F
廠商: INFINEON TECHNOLOGIES AG
英文描述: 16-Bit Single-Chip Microcontroller with C166SV2 Core
中文描述: 16位單片機與C166SV2核心
文件頁數(shù): 59/68頁
文件大?。?/td> 732K
代理商: SAF-XC164N-8F20F
XC164N
Derivatives
Timing Parameters
Data Sheet
54
V1.0, 2005-01
For a period of
N
×
TCM the accumulated PLL jitter is defined by the deviation D
N
:
D
N
[ns] =
±
(1.5 + 6.32
×
N
/
f
MC
);
f
MC
in [MHz],
N
= number of consecutive TCMs.
So, for a period of 3 TCMs @ 20 MHz and K = 12: D
3
=
±
(1.5 + 6.32
×
3
/
20) = 2.448 ns.
This formula is applicable for K
×
N
< 95. For longer periods the K
×
N
=95 value can be
used. This steady value can be approximated by: D
N
max
[ns] =
±
(1.5 + 600
/
(K
×
f
MC
)).
Figure 14
Approximated Accumulated PLL Jitter
Note: The bold lines indicate the minimum accumulated jitter which can be achieved by
selecting the maximum possible output prescaler factor K.
Different frequency bands can be selected for the VCO, so the operation of the PLL can
be adjusted to a wide range of input and output frequencies:
Table 13
VCO Bands for PLL Operation
1)
PLLCON.PLLVB VCO Frequency Range
00
100
150 MHz
01
150
200 MHz
10
200
250 MHz
11
Reserved
1) Not subject to production test - verified by design/characterization.
Base Frequency Range
20
80 MHz
40
130 MHz
60
180 MHz
mcb04413_xc.vsd
Acc. jitter
D
N
ns
±8
±6
±4
±2
±1
0
5
10
20
25
N
1 MH
K=5
20MHz
40 MHz
±7
±5
±3
15
K=6
K=12
K=15
K=8
K=10
1
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SAF-XC164N-8F40FBB 制造商:Rochester Electronics LLC 功能描述: 制造商:Infineon Technologies AG 功能描述:
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