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C505L
Data Sheet
22
06.99
Serial
Channel
ADCON0
2)
PCON
2)
SBUF
SCON
SRELL
SRELH
A/D Converter Control Register 0
Power Control Register
Serial Channel Buffer Register
Serial Channel Control Register
Serial Channel Reload Register, low byte
Serial Channel Reload Register, high byte
D8
H
87
H
99
H
98
H
AA
H
BA
H
88
H
8C
H
8D
H
8A
H
8B
H
89
H
C1
H
C3
H
C5
H
C7
H
C2
H
C4
H
C6
H
CB
H
CA
H
CD
H
CC
H
C8
H
A8
H
B8
H
86
H
A8
H
B8
H
A9
H
87
H
88
H
1)
1)
00X00000
B
00
H
XX
H
00
H
D9
H
XXXXXX11
B
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00X00000
B
00
H
00
H
00
H
00
H
00
H
00
H
00
H
0XX0XXXX
B
3)
3)
3)
Timer 0/
Timer 1
TCON
TH0
TH1
TL0
TL1
TMOD
Timer 0/1 Control Register
Timer 0, High Byte
Timer 1, High Byte
Timer 0, Low Byte
Timer 1, Low Byte
Timer Mode Register
1)
Compare/
Capture
Unit /
Timer 2
CCEN
CCH1
CCH2
CCH3
CCL1
CCL2
CCL3
CRCH
CRCL
TH2
TL2
T2CON
IEN0
2)
IEN1
2)
Comp./Capture Enable Reg.
Comp./Capture Reg. 1, High Byte
Comp./Capture Reg. 2, High Byte
Comp./Capture Reg. 3, High Byte
Comp./Capture Reg. 1, Low Byte
Comp./Capture Reg. 2, Low Byte
Comp./Capture Reg. 3, Low Byte
Reload Register High Byte
Reload Register Low Byte
Timer 2, High Byte
Timer 2, Low Byte
Timer 2 Control Register
Interrupt Enable Register 0
Interrupt Enable Register 1
1)
1)
1)
3)
3)
Watchdog
WDTREL
IEN0
2)
IEN1
2)
IP0
2)
Watchdog Timer Reload Register
Interrupt Enable Register 0
Interrupt Enable Register 1
Interrupt Priority Register 0
1)
1)
Power
Save
Modes
PCON
2)
PCON1
4)
Power Control Register
Power Control Register 1
1)
3)
1) Bit-addressable SFRs
2) This SFR is listed repeatedly since some bits of it also belong to other functional blocks.
3) “X” means that the value is undefined and the location is reserved
4) SFR is located in the mapped SFR area. For accessing this SFR, bit RMAP in SFR SYSCON must be set.
Table 2
Special Function Registers - Functional Blocks
(cont’d)
Block
Symbol
Name
Address
Contents after
Reset