參數(shù)資料
型號: SAB83C515A-5N18-T3
廠商: SIEMENS A G
元件分類: 微控制器/微處理器
英文描述: 8-Bit CMOS Single-Chip Microcontroller
中文描述: 8-BIT, MROM, 18 MHz, MICROCONTROLLER, PQCC68
封裝: PLASTIC, LCC-68
文件頁數(shù): 48/57頁
文件大?。?/td> 899K
代理商: SAB83C515A-5N18-T3
SAB 80C515A/83C515A-5
Semiconductor Group
47
AC Characteristics
V
CC
= 5 V + 10 %, – 15 %;
V
SS
= 0 V
T
A
=
0 to 70 C for the SAB 80C515A/83C515A-5
T
A
=
40 to 85 C for the SAB 80C515A-T3/83C515A-5-T3
(
C
L
for port 0, ALE and PSEN outputs = 100 pF;
C
L
for all other outputs = 80 pF)
Parameter
Symbol
Limit values
Unit
18 MHz clock
Variable clock
1/
t
CLCL
= 3.5 MHz to 18 MHz
min.
max.
min.
max.
Program Memory Characteristics
ALE pulse width
t
LHLL
71
2
t
C LCL
– 40
ns
Address setup to ALE
t
AVLL
26
t
C LCL
– 30
ns
Address hold after ALE
t
LLAX
26
t
C LCL
– 30
ns
ALE to valid
instruction in
t
LLIV
122
4
t
C LCL
– 100 ns
ALE to PSEN
t
LLPL
31
t
C LCL
– 25
ns
PSEN pulse width
t
PLPH
132
3
t
C LCL
– 35
ns
PSEN to valid
instruction in
t
PLIV
92
3
t
C LCL
– 75
ns
Input instruction hold
after PSEN
t
PXIX
0
0
ns
Input instruction float
after PSEN
t
PXIZ
*)
46
t
C LCL
– 10
ns
Address valid after
PSEN
t
PXAV
*)
48
t
C LCL
– 8
ns
Address to valid
instruction in
t
AVIV
218
5
t
C LCL
60
ns
Address float to PSEN
t
A ZPL
0
0
ns
*)
Interfacing the SAB 80C515A to devices with float times up to 45 ns is permissible.
This limited bus contention will not cause any damage to port 0 drivers.
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