參數(shù)資料
型號(hào): SAB80C535
廠(chǎng)商: SIEMENS AG
英文描述: 8-Bit CMOS Microcontroller(8位CMOS微控制器)
中文描述: 8位CMOS微控制器(8位的CMOS微控制器)
文件頁(yè)數(shù): 2/3頁(yè)
文件大?。?/td> 12K
代理商: SAB80C535
Errata Sheet SAB 80C515 / 80C535, LB-Step, 1.0
-2/3
1) Functional Problems
The following malfunctions or problems are known in this step:
Problem 1 :
Automatic Start of the Watchdog Timer after Reset
The SAB 80C515/80C535 LB-Step provides an additional functionality at the pin PE#: an automatic
start of the watchdog timer after a hardware reset. This automatic start of the watchdog timer after
a hardware reset is executed when pin PE# is held at high level during the rising edge of the
RESET# signal (termination of the reset state). A 0-to-1 transition at PE# during normal operating
mode will not start the watchdog timer.
If pin PE# is at low level during the rising edge of RESET#, the watchdog timer is not started
automatically (common to DA- and LB-Step). In this case it can be started only by software by
setting bit SWDT in SFR IEN1 during the normal operating mode of the microcontroller.
If pin PE# is unconnected, it is pulled high internally by a weak pull-up transistor. This is common to
DA- and LB-Step too, but in the LB-Step this additionally starts the watchdog timer after the rising
edge of RESET#.
Workaround :
When pin PE# is connected to low level, no automatic start of the watchdog timer occurs after a
reset operation. Further, during normal operating mode the power saving modes are enabled and
can be (if required) disabled by setting PE# to high level.
Note :
The next revisions of Data Sheet and User Manual will be updated with the description of
the new PE# pin functionality.
1) Electrical- and Timing-Spec. Deviations
The following deviations of electrical and timing parameters from the specification are known in this
step:
None.
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