參數(shù)資料
型號: SAB80C517A-N18-T3
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 18 MHz, MICROCONTROLLER, PQCC84
封裝: PLASTIC, LCC-84
文件頁數(shù): 122/137頁
文件大小: 2089K
代理商: SAB80C517A-N18-T3
Device Specification
Semiconductor Group
7-23
s
00
10
X1
DPTR
<
XRAM
ad
dres
s
ran
g
e
MO
VX
@Ri
MO
VX
@D
P
T
R
a)
P0/P2
¨
Bus
b)
RD
/WR
ac
ti
ve
c
)ex
t.
m
e
m
o
ry
is
us
ed
a)
P0
/P2
¨
Bus
b)
RD
/WR
ac
tiv
e
c
)ex
t.
me
mo
ry
is
u
s
e
d
a)
P0/P2
¨
Bus
b)
R
D
/WR
ac
ti
v
e
c)
ex
t.
me
m
o
ry
i
s
us
ed
a)
P0/P2
¨
Bus
b)
R
D
/WR
ac
tiv
e
c)
ex
t.
m
e
m
o
ry
is
us
ed
a)
P0
/P2
¨
Bus
b)
RD
/WR
ac
tiv
e
c
)ex
t.
me
mo
ry
is
u
s
e
d
a
)P0/
P
2
¨
Bu
s
b)
RD
/WR
a
c
ti
ve
c
)e
x
t.
me
mo
ry
i
s
u
s
ed
a
)P0/P2
¨
Bus
b)
RD
/WR
a
c
ti
ve
c
)ex
t.
m
e
m
o
ry
i
s
us
ed
a)
P0/P2
¨
Bus
b)
RD
/WR
ac
ti
ve
c
)ex
t.
m
e
m
o
ry
is
us
ed
m
o
des
com
p
a
ti
b
le
to
805
1
-
fa
m
ily
00
10
X1
XM
A
P
1
,XM
A
P
0
EA
=
0
a)
P0/P2
¨
BUS
(WR
-
D
at
a
on
ly
)
b)
RD
/WR
i
nac
tiv
e
c
)XRAM
is
us
ed
a)
P0/P2
¨
BUS
(WR
-D
a
ta
onl
y)
b)
RD
/WR
ac
tiv
e
c
)XRAM
i
s
us
ed
a
)P0/
P
2
¨
I/
0
b)
RD
/WR
ina
c
ti
ve
c
)XRAM
is
u
s
ed
a
)P0/P2
¨
BUS
(WR
-D
at
a
o
n
ly
)
b)
RD
/WR
a
c
ti
ve
c
)XRAM
is
us
ed
a)
P0/P2
¨
BUS
(WR
-
D
at
a
on
ly
)
P2
¨
I/0
b)
RD
/WR
i
nac
tiv
e
c
)XRAM
is
us
ed
a)
P0/P2
¨
BUS
(WR
-D
a
ta
onl
y)
P2
¨
I/0
b)
RD
/WR
ac
tiv
e
c
)XRAM
i
s
us
ed
a)
P0
¨
Bus
P2
¨
I/
0
b)
RD
/WR
ac
tiv
e
c
)ex
t.
me
mo
ry
is
u
s
e
d
a
)P0/
P
2
¨
I/
0
b)
RD
/WR
ina
c
ti
ve
c
)XRAM
is
u
s
ed
a)
P
0
¨
BU
S
(WR
-D
at
a
o
n
ly
)
P2
¨
I/0
b)
RD
/WR
a
c
ti
ve
c
)XRAM
is
us
ed
a)
P0
¨
Bu
s
P2
¨
I/0
b)
RD
/WR
ac
ti
ve
c
)ex
t.
m
e
m
o
ry
is
us
ed
a)
P0
¨
Bu
s
P2
¨
I/0
b)
RD
/WR
ac
tiv
e
c)
ex
t.
m
e
m
o
ry
is
us
ed
a)
P0
¨
Bus
P2
¨
I/
0
b)
RD
/WR
ac
tiv
e
c
)ex
t.
me
mo
ry
is
u
s
e
d
a)
P
0
¨
Bus
P2
¨
I/0
b)
RD
/WR
a
c
ti
ve
c
)e
x
t.
me
mo
ry
i
s
u
s
ed
a)
P
0
¨
Bus
P2
¨
I/0
b)
RD
/WR
a
c
ti
ve
c
)ex
t.
m
e
m
o
ry
i
s
us
ed
a)
P0
¨
Bu
s
P2
¨
I/0
b)
RD
/WR
ac
ti
ve
c
)ex
t.
m
e
m
o
ry
is
us
ed
DPTR
≥XRAM
ad
dres
s
ran
g
e
XPAGE
<
XRAM
ad
dr.
pag
e
ran
g
e
XPAGE
≥XRAM
a
ddr.
pa
ge
ra
nge
XM
AP1
,XM
AP0
EA
=
1
a)
P0
¨
Bu
s
P2
¨
I/0
b)
RD
/WR
a
c
ti
ve
c
)ex
t.
m
e
m
o
ry
is
us
ed
Table
1:
B
e
haviour
of
P0/P2
and
RD
/WR
during
MOV
X
accesses
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