參數(shù)資料
型號(hào)： SAB-XC167CI-16F20F
廠商： INFINEON TECHNOLOGIES AG
元件分類(lèi)： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP144
封裝： 0.50 MM PITCH, PLASTIC, TQFP-144
文件頁(yè)數(shù)： 7/80頁(yè)
文件大小： 2477K
代理商： SAB-XC167CI-16F20F
XC167
Derivatives
General Device Information
Data Sheet
11
V1.1, 2003-06
Preliminary
P3
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
P3.8
P3.9
P3.10
P3.11
P3.12
P3.13
P3.15
59
60
61
62
63
64
65
66
67
68
69
70
75
76
77
IO
I
O
I
O
I/O
I
O
I
I/O
O
I
I/O
I
O
I
I/O
I
O
Port 3 is a 15-bit bidirectional I/O port. Each pin can be
programmed for input (output driver in high-impedance
state) or output (configurable as push/pull or open drain
driver). The input threshold of Port 3 is selectable (standard
or special).
The following Port 3 pins also serve for alternate functions:
T0IN
CAPCOM1 Timer T0 Count Input,
TxD1
ASC1 Clock/Data Output (Async./Sync),
EX1IN
Fast External Interrupt 1 Input (alternate pin B)
T6OUT
GPT2 Timer T6 Toggle Latch Output,
RxD1
ASC1 Data Input (Async.) or Inp./Outp. (Sync.),
EX1IN
Fast External Interrupt 1 Input (alternate pin A)
CAPIN
GPT2 Register CAPREL Capture Input
T3OUT
GPT1 Timer T3 Toggle Latch Output
T3EUD
GPT1 Timer T3 External Up/Down Control Input
T4IN
GPT1 Timer T4 Count/Gate/Reload/Capture Inp
T3IN
GPT1 Timer T3 Count/Gate Input
T2IN
GPT1 Timer T2 Count/Gate/Reload/Capture Inp
MRST0
SSC0 Master-Receive/Slave-Transmit In/Out.
MTSR0
SSC0 Master-Transmit/Slave-Receive Out/In.
TxD0
ASC0 Clock/Data Output (Async./Sync.),
EX2IN
Fast External Interrupt 2 Input (alternate pin B)
RxD0
ASC0 Data Input (Async.) or Inp./Outp. (Sync.),
EX2IN
Fast External Interrupt 2 Input (alternate pin A)
BHE
External Memory High Byte Enable Signal,
WRH
External Memory High Byte Write Strobe,
EX3IN
Fast External Interrupt 3 Input (alternate pin B)
SCLK0
SSC0 Master Clock Output / Slave Clock Input.,
EX3IN
Fast External Interrupt 3 Input (alternate pin A)
CLKOUT
Master Clock Output,
FOUT
Programmable Frequency Output
TCK
71
I
Debug System: JTAG Clock Input
TDI
72
I
Debug System: JTAG Data In
TDO
73
O
Debug System: JTAG Data Out
TMS
74
I
Debug System: JTAG Test Mode Selection
Table 2
Pin Definitions and Functions (cont’d)
Symbol Pin
Num.
Input
Outp.
Function
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