- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄385814 > SAB-C541U-1EP (SIEMENS A G) 8-Bit CMOS Microcontroller PDF資料下載
參數(shù)資料
| 型號(hào)： | SAB-C541U-1EP |
| 廠(chǎng)商： | SIEMENS A G |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 8-Bit CMOS Microcontroller |
| 中文描述： | 8-BIT, OTPROM, 12 MHz, MICROCONTROLLER, PDIP52 |
| 文件頁(yè)數(shù)： | 34/65頁(yè) |
| 文件大小： | 427K |
| 代理商： | SAB-C541U-1EP |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)當(dāng)前第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)
Semiconductor Group
34
1997-10-01
C540U
C541U
Fail Save Mechanisms
The C540U/C541U offers enhanced fail safe mechanisms, which allow an automatic recovery from
software upset or hardware failure :
– a programmable watchdog timer (WDT), with variable time-out period from 256
μ
s up to
approx. 0.55
μ
s at 12 MHz. The WDT is not available in the C540U.
– an oscillator watchdog (OWD) which monitors the on-chip oscillator and forces the
microcontroller into reset state in case the on-chip oscillator fails; it also provides the clock for
a fast internal reset after power-on.
The watchdog timer in the C517A is a 15-bit timer, which is incremented by a count rate of
f
OSC
/12
or
f
OSC
/192. The system clock of the C517A is divided by two prescalers, a divide-by-two and a
divide-by-16 prescaler which are selected by bit WDTPSEL (WDTREL.7). For programming of the
watchdog timer overflow rate, the upper 7 bit of the watchdog timer can be written.
Figure 8-18
shows the block diagram of the watchdog timer unit.
Figure 18
Block Diagram of the Watchdog Timer
The watchdog timer can be started by software (bit SWDT) but it cannot be stopped during active
mode of the C541U. If the software fails to refresh the running watchdog timer an internal reset will
be initiated on watchdog timer overflow. For refreshing of the watchdog timer the content of the SFR
WDTREL is transfered to the upper 7-bit of the watchdog timer. The refresh sequence consists of
two consequtive instructions which set the bits WDT and SWDT each. The reset cause (external
reset or reset caused by the watchdog) can be examined by software (flag WDTS). It must be noted,
however, that the watchdog timer is halted during the idle mode and power down mode of the
processor.
MCB03384
WDCON (COH
OSC
f
-
-
-
-
OWDS
WDTS
WDT
SWDT
2
16
14
0
7
8
WDTL
WDTH
/ 6
External HW Reset
Control Logic
6
7
0
WDT Reset-Request
WDTPSEL
WDTREL
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAB-R2000A | MOSFET N-CH 300V 73A TO-264AA |
| SAB-R2000A-12-A | HIGH PERFORMANCE 32-BIT RISC MICROPROCESSOR |
| SAB-R2000A-16-A | MOSFET N-CH 200V 90A TO-264AA |
| SAB-R2000A-20-A | MOSFET N-CH 200V 50A TO-204AE |
| SAB-R2010A | MOSFET N-CH 200V 106A SOT-227B |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S-ABF03-P20-512 | 制造商:RadiSys 功能描述:2.0 PENTIUM M 512 GB |
| SABIE10-001 | 制造商:Synapse Wireless 功能描述:E10 WO/CASE, SNAP CONNECT SOFT 制造商:Synapse Wireless 功能描述:E10 NO CASE 制造商:Synapse Wireless 功能描述:custom board SLE10M-BOARD |
| SABIX A 200 FRNC 10G0,50 M | 制造商:SAB Broeckskes 功能描述:Roll |
| SABIX A 200 FRNC 12G0,50 M | 制造商:SAB Broeckskes 功能描述:Roll |
| SABIX A 200 FRNC 4G4,0 MM | 制造商:SAB Broeckskes 功能描述:Roll |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。