- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374691 > SAB-C505A-4EM (SIEMENS A G) 8-Bit CMOS Microcontroller PDF資料下載
參數(shù)資料
| 型號(hào)： | SAB-C505A-4EM |
| 廠商： | SIEMENS A G |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-Bit CMOS Microcontroller |
| 中文描述： | 8-BIT, OTPROM, 20 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | PLASTIC, MQFP-44 |
| 文件頁數(shù)： | 48/85頁 |
| 文件大?。?/td> | 335K |
| 代理商： | SAB-C505A-4EM |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁當(dāng)前第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁
Semiconductor Group
48
1997-12-01
C505 / C505C
C505A / C505CA
Fail Save Mechanisms
The C505 offers enhanced fail safe mechanisms, which allow an automatic recovery from software
upset or hardware failure :
– a programmable watchdog timer (WDT), with variable time-out period from 192
μ
s up to
approx. 412.5 ms at 16 MHz.
– an oscillator watchdog (OWD) which monitors the on-chip oscillator and forces the
microcontroller into reset state in case the on-chip oscillator fails; it also provides the clock for
a fast internal reset after power-on.
The watchdog timer in the C505 is a 15-bit timer, which is incremented by a count rate of
f
OSC
/12
upto
f
OSC
/192. The system clock of the C505 is divided by two prescalers, a divide-by-two and a
divide-by-16 prescaler. For programming of the watchdog timer overflow rate, the upper 7 bits of the
watchdog timer can be written.
Figure 24
shows the block diagram of the watchdog timer unit.
Figure 24
Block Diagram of the Programmable Watchdog Timer
The watchdog timer can be started by software (bit SWDT in SFR IEN1) but it cannot be stopped
during active mode of the device. If the software fails to refresh the running watchdog timer an
internal reset will be initiated on watchdog timer overflow. For refreshing of the watchdog timer the
content of the SFR WDTREL is transfered to the upper 7-bit of the watchdog timer. The refresh
sequence consists of two consequtive instructions which set the bits WDT and SWDT each. The
reset cause (external reset or reset caused by the watchdog) can be examined by software (flag
WDTS). It must be noted, however, that the watchdog timer is halted during the idle mode and
power down mode of the processor.
MCB03306
IP0 (A9 )
OSC
f
WDTS
2
16
14
0
7
8
WDTL
WDTH
/ 6
External HW Reset
Control Logic
IEN0 (A8 )
IEN1 (B8 )
6
7
0
WDT Reset - Request
WDTPSEL
WDTREL (86 )
WDT
SWDT
OWDS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAF-C505A-4EM | 8-Bit CMOS Microcontroller |
| SAF-C505-2RM | 8-Bit CMOS Microcontroller |
| SAB-C505-2RM | 8-Bit CMOS Microcontroller |
| SAB-C513AO | 8-bit CMOS Microcontroller |
| SAF-C513AO | 8-bit CMOS Microcontroller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAB-C505A-4EM-BA | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SAB-C505C-2RM | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8-Bit CMOS Microcontroller |
| SAB-C505CA-4EM | 制造商:Infineon Technologies 功能描述:Bulk |
| SAB-C505CA-4EM CA | 功能描述:8位微控制器 -MCU 8 BIT OTP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| SAB-C505CA-4EM CATR | 制造商:Infineon Technologies AG 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。