參數(shù)資料
型號(hào)： SAA7785
廠商： NXP Semiconductors N.V.
英文描述： ThunderBird Avenger（TM） PCI Audio Accelerator(雷鳥Avenger（TM）PCI音頻加速器)
中文描述： 雷鳥復(fù)仇者（商標(biāo)）的PCI音頻加速器（雷鳥復(fù)仇者（商標(biāo)）的PCI音頻加速器）
文件頁數(shù)： 32/68頁
文件大?。?/td> 1303K
代理商： SAA7785
ThunderBird Avenger
TM
PCI Audio
Accelerator
SAA7785
Philips Semiconductors
Preliminary Specification
1999
Nov 12
32
These bits correspond to Function 0, Subsystem ID (offset 2Eh) bits 2, 1, and 0, respectively. The Vendor should
choose and ID that corresponds to the peripherals present and program the EEPROM accordingly.
PCI Datapath
The PCI datapath provides the flip flops to convert the external PCI interface address, data, command and byte enables
busses to the internal PM and PS busses.
PCI Configuration Register
Since the SSA7785 ThunderBird Avenger is a multi-function device, there are three configuration headers. They are
defined as the audio configuration header as function 0, the joystick configuration header as function 1, and the UART
configuration header defined as function 2. Each configuration space is divided up into two groups, the registers that
stay with the PCI interface and the registers that do not. This section will describe the PCI configuration registers that
bunk with the PCI interface. These registers include the PCI standard configuration header registers and the base
address registers for various blocks in the SSA7785 ThunderBird Avenger chip.
To be more specific, the registers in the offset config space from 00h - 3Fh are the predefined PCI configuration header.
All three PCI configuration header registers will reside with the PCI interface. The remainder of the registers are func-
tion specific and can be found in the block section itself.
The following sections will detail each of the configuration header spaces for each of the SSA7785 ThunderBird
Avenger functions: audio, joystick and UART.
PCI Configuration Space 0
The following table is a summary of all the PCI configuration space registers. The registers that are block-mates with
the PCI interface (offset 00h - 44h) will be detailed following SSA7785 ThunderBird Avenger. The remainder of the
registers will be detailed with the blocks they control.
TABLE 9
PCI Configuration Space 0 Register Map
00Fh
0
01Fh
0
02Fh
0
03Fh
0
04Fh
0
05Fh
0
Byte 3
Byte 2
Byte 1
Byte 0
Offset
00h
04h
08h
0Ch
10h
14h
18h
1Ch
20-2Bh
Device ID
Status
Vendor ID
Command
Class Code
Header Type
Revision ID
Cache Line Size
BIST
Master Latency Timer
SONGBASE
SBBASE
MDBASE
ALBASE
Reserved
Function 0 - Audio Subsystem
Function 1 - Joystick
Function 2 - 16650 Modem UART
Subsystem Vendor
ID - Offset 2Ch
Subsystem ID -
Offset 2Eh
Subsystem Vendor
ID - Offset 2Ch
Subsystem ID -
Offset 2Eh
Subsystem Vendor
ID - Offset 2Ch
Subsystem ID -
Offset 2Eh
EEPROM
Bit #
Reg
Bit #
EEPROM
Bit #
Reg
Bit #
EEPROM
Bit #
Reg
Bit #
EEPROM
Bit #
Reg
Bit #
EEPROM
Bit #
Reg
Bit #
EEPROM
Bit #
Reg
Bit #
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