參數(shù)資料
型號： SAA7283GP
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： Terrestrial Digital Sound Decoder TDSD3
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： 14 X 20 MM, 2.80 MM HEIGHT, PLASTIC, SOT-319-2, QFP-64
文件頁數(shù)： 18/36頁
文件大?。?/td> 178K
代理商： SAA7283GP
1996 Oct 24
18
Philips Semiconductors
Preliminary specification
Terrestrial Digital Sound Decoder (TDSD3)
SAA7283
DIGITAL AUDIO INTERFACE IEC/EBU 958
Block structure
The output is grouped into a block of 192 consecutive
frames providing, for each channel the 192 channel status
data bits. The start of a block is designated by a special
sub-frame preamble.
Frame structure
Each frame is uniquely composed of two sub-frames.
The rate of transmission of frames corresponds exactly to
the source sampling frequency. In the 2-channel
operation, samples taken from both channels are
transmitted by time multiplexing in consecutive
sub-frames. Sub-frames related to Channel 1 (left or ‘A’
channel in stereophonic operation and primary channel in
monophonic operation) normally use preamble M.
However the preamble is changed to preamble B once
every 192 frames. This defines the block structure used to
organize the channel status information. Sub-frames of
Channel 2 (right or ‘B’ channel in stereophonic operation
and secondary channel in monophonic operation) always
use preamble W.
Sub-frame structure
Each frame is divided into 32 time-slots numbered 0 to 31.
Time-slots 0 to 3 carry one of three permitted preambles.
These are used to affect synchronization of sub-frames,
frames and blocks.
Time-slots 4 to 27 carry the audio sample word in linear
two's complement representation. The most significant bit
is carried by time-slot 27.
Time-slot 28 carries the validity flag associated with the
audio sample word. This flag is set to logic 0 if the audio
sample is reliable. If set to logic 1 then the sample is
unreliable.
Time-slot 29 carries one bit of the user data channel.
In this application this is not used and so is set to logic 0.
Time-slot 30 carries one bit of the channel status word
associated with the audio channel transmitted in the same
sub-frame.
Time-slot 31 carries a parity bit such that time-slots 4 to 31
inclusive will carry an even number of ones and an even
number of zeros.
Fig.5 Frame format.
handbook, full pagewidth
MLB155
M
channel 1
sub-frame
W
channel 2
B
channel 1
W
channel 2
M
channel 1
W
channel 2
sub-frame
frame 0
start of block
frame 1
frame 191
Fig.6 Sub-frame structure.
handbook, full pagewidth
MLB156
sync
preamble
logical 0 bits
audio sample word
M
S
B
V
U C
P
L
S
B
4
0
28
31
27
validity flag
user data = logic 0
channel status
parity bit
3
11 12
相關(guān)PDF資料
PDF描述
SAA7284GP Terrestrial digital sound decoder for conventional intercarrier PLL-IF systems
SAA7384 Terrestrial digital sound decoder for conventional intercarrier PLL-IF systems
SAA7284 Terrestrial digital sound decoder for conventional intercarrier PLL-IF systems
SAA7284ZP Terrestrial digital sound decoder for conventional intercarrier PLL-IF systems
SAA7324 Digital servo processor and Compact Disc decoder with integrated DAC (CD10 II)(具有綜合數(shù)模轉(zhuǎn)換器（DAC）的數(shù)字伺服處理器和光盤譯碼器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAA7283ZP 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Terrestrial Digital Sound Decoder TDSD3
SAA7284 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Terrestrial digital sound decoder for conventional intercarrier PLL-IF systems
SAA7284GP 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Terrestrial digital sound decoder for conventional intercarrier PLL-IF systems
SAA7284ZP 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Terrestrial digital sound decoder for conventional intercarrier PLL-IF systems
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