參數(shù)資料
型號(hào): SAA7201H
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: Integrated MPEG2 AVG decoder
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP160
封裝: 28 X 28 MM, 3.40 MM HEIGHT, PLASTIC, MO-112, SOT-322-1, QFP-160
文件頁(yè)數(shù): 6/36頁(yè)
文件大?。?/td> 292K
代理商: SAA7201H
1997 Jan 29
6
Philips Semiconductors
Objective specification
Integrated MPEG2 AVG decoder
SAA7201
PINNING
SYMBOL
PIN
DESCRIPTION
V
I/O
MUX
CPU_TYPE
DMA_ACK
DMA_REQ
DMA_DONE
DMA_RDY
V
SS1
CS
DS
AS
R/W
DTACK
V
DD1
IRQ0
IRQ1
IRQ2
IRQ3
V
SS2
V
SSCO1
V
DDCO1
DATA0
DATA1
DATA2
DATA3
V
DD2
DATA4
DATA5
DATA6
DATA7
V
SS3
DATA8
DATA9
DATA10
DATA11
V
DD3
DATA12
DATA13
DATA14
DATA15
V
SS4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
multiplexed/non-multiplexed (active LOW) bus input
Intel/Motorola (active LOW) selection input
DMA acknowledge input
DMA request input and output
DMA end input
DMA ready output
ground for pad ring
chip select input
data strobe input
address strobe input
read/write (active LOW) input
data acknowledge output
supply for pad ring
individually maskable interrupts
individually maskable interrupts
individually maskable interrupts
individually maskable interrupts
ground for pad ring
ground for core logic
supply for core logic
CPU data interface
CPU data interface
CPU data interface
CPU data interface
supply for pad ring
CPU data interface
CPU data interface
CPU data interface
CPU data interface
ground for pad ring
CPU data interface
CPU data interface
CPU data interface
CPU data interface
supply for pad ring
CPU data interface
CPU data interface
CPU data interface
CPU data interface
ground for pad ring
5.0
5.0
3.3
3.3
3.3
3.3
3.3
5.0
5.0
5.0
5.0
5.0
3.3
3.3
3.3
3.3
3.3
3.3
5.0
5.0
5.0
5.0
3.3
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
I
I
I
I/O
I
O/Z
I
I
I
I
O/Z
O/Z
O/Z
O/Z
O/Z
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
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