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參數(shù)資料
| 型號(hào)： | SA9904BPA |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Three Phase Power / Energy IC with SPI Interface |
| 中文描述： | 三相功率/能量芯片，SPI接口 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 106K |
| 代理商： | SA9904BPA |
I = Line current or if a CT is used
Rsh = Shunt resistor or CT termination resistor.
Rsh should be less than the resistance of the CT's secondary
winding.
= Line current / CT ratio
Figure 6 shows the voltage sense (IVP) input configuration for
one phase. The exact circuit is duplicated for the other two
phases. The current into the voltage sense inputs (virtual
ground) should be set to
14μA
The voltage sense inputs saturate at an input current of ±25μA
peak.
at rated voltage conditions.
I
L
RMS
Voltage Sense Input (IVP1, IVP2, IVP3)
the micro controller and the SA9904B. The clock signal on this
pin is generated by the micro controller and determines the
datatransferrateoftheDOandDIpins.
TheDIpinistheserialdatainputpinfortheSA9904B.Datawill
be input at a rate determined by the Serial Clock (SCK). Data
willbeacceptedonlyduringanactivechipselect(CS).
The CS input is used to address the SA9904B. An active high
onthispinenablestheSA9904Btoinitiatedataexchange.
Serial Data In (DI)
ChipSelect(CS)
OUTPUTSIGNALS
SerialDataOut(DO)
The DO pin is the serial data output pin for the SA9904B. The
Serial Clock (SCK) determines the data output rate. Data is
only transferred during on active chip select (CS). This output
istri-statewhenCSislow.
MainsVoltagesensezerocrossover (F50)
The F50 output generates a signal, which follows the mains
voltage zero crossings, see figure 7.
pulse on the rising edge of the mains voltage zero crossing
point.Internallogicensuresthatthissignalisgeneratedfroma
valid phase. Should all three phase be missing but power still
applied to the SA9904B this output will generate a constant
54Hz signal.
The micro controller can use the F50 to extract
mainstiming.
This output generates a
Figure 7: Mains voltage zero crossover
Figure 6: Voltage sense input configuration
The individual mains voltages are divided down to
phase. The resistor R8 sets the current for the voltage sense
input. The voltage divider is calculated for a voltage drop of 14V.
Withaphasevoltageof230Vtheequationforthevoltagedivider
is:
RA=R16+R19+R22
RB=R8||R13
Combiningthetwoequationsgives:
(RA+RB)/230V=RB/14V
A24KresistorischosenforR13anda1MresistorforR8.
Substitutingthesevaluesresultsin:
RB=23.44K
RA=RBx(230V/14V-1)
RA=361.6K
Resistor values for R16, R19 and R22 is chosen to be 120K
each.
per
The capacitor C5 is used to compensate for any phase shift
between the voltage sense and current sense input
caused by
the current transformer. As an example to compensate for a
phase shift of 0.18 degrees the capacitor value is calculated as
follows:
C=1/(2x
xMainsfrequencyxR5xtan(Phaseshiftangle))
C=1/(2x
x50Hzx1M
xtan(0.18degrees))
C=1.013μF
The VREF pin is the reference for the bias resistor. With a bias
resistorof47k
connectedtoVssoptimumconditionsareset.
The SCK pin is used to synchronize data interchange between
14V
RMS
Reference Voltage (VREF)
Serial Clock (SCK)
R8
R13
Ch1 Voltage
C5
R16
R19
R22
IVP1
Neutral
Dr-01645
GND
GND
14μA
RMS
14V
RMS
SPI-INTERFACE
Description
A serial peripheral interface bus (SPI) is a synchronous bus
used for data transfers between a micro controller and the
SA9904B. The pins DO (Serial Data Out), DI (Serial Data In),
CS (Chip Select), and SCK (Serial Clock) are used in the bus
implementation. The SA9904B is the slave device with the
micro controller being bus master. The CS input initiates and
terminates data transfers. A SCK signal (generated by the
micro controller) strobes data between the micro-controller
F50
1ms to 2ms
+5V
0V (Vss)
Phase Voltage
Dr-01646
1ms to 2ms
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