參數(shù)資料
型號: SA572DTBR2G
廠商: ON Semiconductor
文件頁數(shù): 8/12頁
文件大小: 0K
描述: IC COMPANDOR 2CHAN GAIN 16-TSSOP
標準包裝: 1
類型: 壓縮擴展器
應(yīng)用: 自動電平控制,立體聲擴展器
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 剪切帶 (CT)
其它名稱: SA572DTBR2GOSCT
SA572
http://onsemi.com
5
The residual distortion is third harmonic distortion and
is caused by gain control ripple. In a compandor system,
available control of fast attack and slow recovery improve
ripple distortion significantly. At the unity gain level of
100 mV, the gain cell gives THD (total harmonic
distortion) of 0.17% typ. Output noise with no input signals
is only 6.0
mV in the audio spectrum (10 Hz-20 kHz). The
output current IO must feed the virtual ground input of an
operational amplifier with a resistor from output to
inverting input. The non-inverting input of the operational
amplifier has to be biased at VREF if the output current IO
is DC coupled.
VREF
THD
TRIM
V+
1
2
IG )
1
2
IO
I1
140mA
280mA
I2
IG
IO
Q4
Q3
Q1
Q2
VIN
+
A1
Figure 3. Basic Gain Cell Schematic
R1
6.8kW
Rectifier
The rectifier is a full-wave design as shown in Figure 4.
The input voltage is converted to current through the input
resistor R2 and turns on either Q5 or Q6 depending on the
signal polarity. Deadband of the voltage to current
converter is reduced by the loop gain of the gain block A2.
If AC coupling is used, the rectifier error comes only from
input bias current of gain block A2. The input bias current
is typically about 70 nA. Frequency response of the gain
block A2 also causes second-order error at high frequency.
The collector current of Q6 is mirrored and summed at the
collector of Q5 to form the full wave rectified output
current IR. The rectifier transfer function is:
IR +
VIN * VREF
R2
(eq. 3)
If VIN is AC-coupled, then the equation will be reduced
to:
IRAC +
VIN(AVG)
R2
The internal bias scheme limits the maximum output
current IR to be around 300 mA. Within a "1.0 dB error
band the input range of the rectifier is about 52 dB.
VIN
VREF
V+
A2
+
IR +
VIN * VREF
R2
Figure 4. Simplified Rectifier Schematic
Q5
Q6
R2
D7
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