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S29PL127J/S29PL064J/S29PL032J for MCP
S29PL127J_064J_032J_MCP_00_A3 August 12, 2004
A d v a n c e I n f o r m a t i o n
Table 14. System Interface String
Addresses
Data
Description
1Bh
0027h
V
CC
Min. (write/erase)
D7–D4: volt, D3–D0: 100 millivolt
V
CC
Max. (write/erase)
D7–D4: volt, D3–D0: 100 millivolt
V
PP
Min. voltage (00h = no V
PP
pin present)
V
PP
Max. voltage (00h = no V
PP
pin present)
Typical timeout per single byte/word write 2
N
μs
Typical timeout for Min. size buffer write 2
N
μ
s (00h = not supported)
Typical timeout per individual block erase 2
N
ms
Typical timeout for full chip erase 2
N
ms (00h = not supported)
Max. timeout for byte/word write 2
N
times typical
Max. timeout for buffer write 2
N
times typical
Max. timeout per individual block erase 2
N
times typical
Max. timeout for full chip erase 2
N
times typical (00h = not supported)
1Ch
0036h
1Dh
1Eh
1Fh
20h
21h
22h
23h
24h
25h
26h
0000h
0000h
0003h
0000h
0009h
0000h
0004h
0000h
0004h
0000h
Table 15. Device Geometry Definition
Addresses
Data
Description
27h
0018h (PL127J)
0017h (PL064J)
0016h (PL032J)
0001h
0000h
0000h
0000h
0003h
0007h
0000h
0020h
0000h
00FDh (PL127J)
007Dh (PL064J)
003Dh (PL032J)
0000h
0000h
0001h
0007h
0000h
0020h
0000h
0000h
0000h
0000h
0000h
Device Size = 2
N
byte
28h
29h
2Ah
2Bh
2Ch
2Dh
2Eh
2Fh
30h
Flash Device Interface description (refer to CFI publication 100)
Max. number of byte in multi-byte write = 2
N
(00h = not supported)
Number of Erase Block Regions within device
Erase Block Region 1 Information
(refer to the CFI specification or CFI publication 100)
31h
Erase Block Region 2 Information
(refer to the CFI specification or CFI publication 100)
32h
33h
34h
35h
36h
37h
38h
39h
3Ah
3Bh
3Ch
Erase Block Region 3 Information
(refer to the CFI specification or CFI publication 100)
Erase Block Region 4 Information
(refer to the CFI specification or CFI publication 100)