參數(shù)資料
型號: S29GL128M90FDIR80
廠商: Spansion Inc.
英文描述: 3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology
中文描述: 3.0伏只頁面模式閃存具有0.23微米工藝技術的MirrorBit
文件頁數(shù): 125/160頁
文件大?。?/td> 2142K
代理商: S29GL128M90FDIR80
April 30, 2004 S29GLxxxM_00A5
S29GLxxxM MirrorBit
TM
Flash Family
125
P r e l i m i n a r y
AC Characteristics
Read-Only Operations-S29GL064M only
Parameter
JEDEC
Std.
Notes:
1. Not 100% tested.
2. See
Figure 11
and Table
34
for test specifications.
Read-Only Operations-S29GL032M only
Parameter
JEDEC
Std.
Notes:
1. Not 100% tested.
2. See
Figure 11
and Table
34
for test specifications.
Description
Test Setup
Speed Options
90
Unit
10
11
t
AVAV
t
RC
Read Cycle Time (Note 1)
Min
90
100
110
ns
t
AVQV
t
ACC
Address to Output Delay
CE#, OE# = V
IL
Max
90
100
110
ns
t
ELQV
t
CE
Chip Enable to Output Delay
OE# = V
IL
Max
90
100
110
ns
t
PACC
Page Access Time
Max
25
30
30
ns
t
GLQV
t
OE
Output Enable to Output Delay
Max
25
30
30
ns
t
EHQZ
t
DF
Chip Enable to Output High Z (Note 1)
Max
16
ns
t
GHQZ
t
DF
Output Enable to Output High Z (Note 1)
Max
16
ns
t
AXQX
t
OH
Output Hold Time From Addresses, CE# or OE#,
Whichever Occurs First
Min
0
ns
t
OEH
Output Enable Hold
Time (Note 1)
Read
Min
0
ns
Toggle and
Data# Polling
Min
10
ns
Description
Test Setup
Speed Options
90
10
Unit
11
t
AVAV
t
RC
Read Cycle Time (Note 1)
Min
90
100
110
ns
t
AVQV
t
ACC
Address to Output Delay
CE#, OE# = V
IL
Max
90
100
110
ns
t
ELQV
t
CE
Chip Enable to Output Delay
OE# = V
IL
Max
90
100
110
ns
t
PACC
Page Access Time
Max
25
30
30
ns
t
GLQV
t
OE
Output Enable to Output Delay
Max
25
30
30
ns
t
EHQZ
t
DF
Chip Enable to Output High Z (Note 1)
Max
16
ns
t
GHQZ
t
DF
Output Enable to Output High Z (Note 1)
Max
16
ns
t
AXQX
t
OH
Output Hold Time From Addresses, CE# or OE#,
Whichever Occurs First
Min
0
ns
t
OEH
Output Enable Hold
Time (Note 1)
Read
Min
0
ns
Toggle and
Data# Polling
Min
10
ns
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