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參數(shù)資料
| 型號(hào)： | S29GL064N11TFIV12 |
| 廠商： | SPANSION LLC |
| 元件分類(lèi)： | DRAM |
| 英文描述： | 64 Megabit, 32 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 110 nm MirrorBit Process Technology |
| 中文描述： | 4M X 16 FLASH 3V PROM, 110 ns, PDSO56 |
| 封裝： | LEAD FREE, MO-142EC, TSOP-56 |
| 文件頁(yè)數(shù)： | 58/79頁(yè) |
| 文件大?。?/td> | 2191K |
| 代理商： | S29GL064N11TFIV12 |
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58
S29GL-N MirrorBit
Flash Family
S29GL-N_01_09 November 16, 2007
D a t a
S h e e t
Figure 10.6
Toggle Bit Algorithm
Note
The system should recheck the toggle bit even if DQ5 =
1
because the toggle bit may stop toggling as DQ5 changes to
1
. See the
subsections on DQ6 and DQ2 for more information.
10.14 DQ2: Toggle Bit II
The “Toggle Bit II” on DQ2, when used with DQ6, indicates whether a particular sector is actively erasing (that
is, the Embedded Erase algorithm is in progress), or whether that sector is erase-suspended. Toggle Bit II is
valid after the rising edge of the final WE# pulse in the command sequence.
DQ2 toggles when the system reads at addresses within those sectors that were selected for erasure. (The
system may use either OE# or CE# to control the read cycles.) But DQ2 cannot distinguish whether the
sector is actively erasing or is erase-suspended. DQ6, by comparison, indicates whether the device is
actively erasing, or is in Erase Suspend, but cannot distinguish which sectors are selected for erasure. Thus,
both status bits are required for sector and mode information. Refer to
Table 10.5 on page 60
to compare
outputs for DQ2 and DQ6.
S
TART
No
Ye
s
Ye
s
DQ5 = 1
No
Ye
s
Toggle Bit
= Toggle
No
Progr
a
m/Er
as
e
Oper
a
tion Not
Complete, Write
Re
s
et Comm
a
nd
Progr
a
m/Er
as
e
Oper
a
tion Complete
Re
a
d DQ7–DQ0
Toggle Bit
= Toggle
Re
a
d DQ7–DQ0
Twice
Re
a
d DQ7–DQ0
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