參數(shù)資料
型號： S29AL016M10BFIR13
廠商： SPANSION LLC
元件分類： DRAM
英文描述： 3-Digit BCD Counter; Package: PDIP-16; No of Pins: 16; Container: Rail; Qty per Container: 500
中文描述： 1M X 16 FLASH 3V PROM, 100 ns, PBGA48
封裝： 6 X 8 MM, LEAD FREE, FBGA-48
文件頁數(shù)： 26/59頁
文件大?。?/td> 1917K
代理商： S29AL016M10BFIR13
27
S29AL016M
S29AL016M_00A4 April 21, 2004
Notes:
See Tables 10 and 11 for program command sequence.
Figure 4. Program Operation
Chip Erase Command Sequence
Chip erase is a six bus cycle operation. The chip erase command sequence is ini-
tiated by writing two unlock cycles, followed by a set-up command. Two
additional unlock write cycles are then followed by the chip erase command,
which in turn invokes the Embedded Erase algorithm. The device does
not
require
the system to preprogram prior to erase. The Embedded Erase algorithm auto-
matically preprograms and verifies the entire memory for an all zero data pattern
prior to electrical erase. The system is not required to provide any controls or tim-
ings during these operations. Tables
10
–
11
show the address and data
requirements for the chip erase command sequence.
Note that the SecSi Sector,
autoselect, and CFI functions are unavailable when an erase operation is in
progress.
Any commands written to the chip during the Embedded Erase algorithm are ig-
nored. Note that a
hardware reset
during the chip erase operation immediately
terminates the operation. The Chip Erase command sequence should be reiniti-
ated once the device has returned to reading array data, to ensure data integrity.
The system can determine the status of the erase operation by using DQ7, DQ6,
DQ2, or RY/BY#. See
“Autoselect Command Sequence”
for information on these
status bits. When the Embedded Erase algorithm is complete, the device returns
to reading array data and addresses are no longer latched.
START
Write Program
Command Sequence
Data Poll
from System
Verify Data
No
Yes
Last Address
No
Yes
Programming
Completed
Increment Address
Embedded
Program
algorithm
in progress
相關(guān)PDF資料
PDF描述
S29AL016M10BFIR20 3-Digit BCD Counter; Package: PDIP-16; No of Pins: 16; Container: Rail; Qty per Container: 500
S29AL016M10BFIR22 Dual Binary to 1-of-4 Decoder/Demultiplexer; Package: PDIP-16; No of Pins: 16; Container: Rail; Qty per Container: 500
S29AL016M10BFIR23 Dual Binary to 1-of-4 Decoder/Demultiplexer; Package: PDIP-16; No of Pins: 16; Container: Rail; Qty per Container: 500
S29AL016M10FAI010 Dual Binary to 1-of-4 Decoder/Demultiplexer; Package: SOIC 16 LEAD; No of Pins: 16; Container: Rail; Qty per Container: 48
S29AL016M10FAI012 Dual Binary to 1-of-4 Decoder/Demultiplexer; Package: SOIC 16 LEAD; No of Pins: 16; Container: Rail; Qty per Container: 48
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S29AL016M10BFIR20 制造商:SPANSION 制造商全稱:SPANSION 功能描述:16 Megabit (2 M x 8-Bit/1 M x 16-Bit) 3.0 Volt-only Boot Sector Flash Memory Featuring MirrorBit⑩ Technology
S29AL016M10BFIR22 制造商:SPANSION 制造商全稱:SPANSION 功能描述:16 Megabit (2 M x 8-Bit/1 M x 16-Bit) 3.0 Volt-only Boot Sector Flash Memory Featuring MirrorBit⑩ Technology
S29AL016M10BFIR23 制造商:SPANSION 制造商全稱:SPANSION 功能描述:16 MEGABIT (2M X 8 BIT / I M X 16 BIT) 3.0 VOLT ONLY BOOT SECTOR FLASH MEMORY
S29AL016M10FAI010 制造商:SPANSION 制造商全稱:SPANSION 功能描述:16 Megabit (2 M x 8-Bit/1 M x 16-Bit) 3.0 Volt-only Boot Sector Flash Memory Featuring MirrorBit⑩ Technology
S29AL016M10FAI012 制造商:SPANSION 制造商全稱:SPANSION 功能描述:16 MEGABIT (2M X 8 BIT / I M X 16 BIT) 3.0 VOLT ONLY BOOT SECTOR FLASH MEMORY
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