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參數(shù)資料
| 型號： | S25FL002D0FNFI013 |
| 廠商： | SPANSION LLC |
| 元件分類： | DRAM |
| 英文描述： | 2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface |
| 中文描述： | 2M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| 封裝： | 6 X 5 MM, LEAD FREE, WSON-8 |
| 文件頁數(shù)： | 25/38頁 |
| 文件大?。?/td> | 892K |
| 代理商： | S25FL002D0FNFI013 |
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June 9, 2004 30167A+1
S25FL Family (Serial Peripheral Interface)
25
P r e l i m i n a r y I n f o r m a t i o n
tional clock cycles on Serial Clock (SCK), while Chip Select (CS#) is driven Low,
causes the Electronic Signature to be output repeatedly.
When Chip Select (CS#) is driven High, the device is put in the Stand-by Power
mode. If the device was not previously in the Software Protect mode, which oc-
curs when the Read ID (READ_ID) instruction is initiated, the transition to the
Stand-by Power mode is immediate. If the device was previously in the Software
Protect mode, though, the transition to the Standby mode is delayed by t
RES
, and
Chip Select (CS#) must remain High for at least t
RES(max)
, as specified in Table
9
. Once in the Stand-by Power mode, the device waits to be selected, so that it
can receive, decode and execute instructions.
Figure 16. Release from Software Protection and Read Electronic Signature (RES), and Read ID (READ_ID)
Instruction Sequence
CS#
SCK
SI
SO
3 Dummy
Bytes
High Impedance
MSB
Software Protect Mode
Standby Mode
0
1
2
3
4
5
6
7
8
9
10
28 29 30 31 32
33 34 35 36
37 38
Electronic ID out
Instruction
t
RES
23 22 21
3
2
1
0
7
6
5
4
3
2
1
0
MSB
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